[PATCH] D114956: [IR,TableGen] Add support for vec3 intrinsic arguments
Jay Foad via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Dec 2 06:38:19 PST 2021
foad created this revision.
foad added reviewers: arsenm, rampitec, critson.
Herald added subscribers: dexonsmith, hiraditya, tpr.
foad requested review of this revision.
Herald added subscribers: llvm-commits, jdoerfert, wdng.
Herald added a project: LLVM.
Add generic support for vec3 types, and in particular define
llvm_v3f32_ty which will be used by AMDGPU's
llvm.amdgcn.image.bvh.intersect.ray intrinsic.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D114956
Files:
llvm/include/llvm/IR/Intrinsics.td
llvm/lib/IR/Function.cpp
llvm/utils/TableGen/IntrinsicEmitter.cpp
Index: llvm/utils/TableGen/IntrinsicEmitter.cpp
===================================================================
--- llvm/utils/TableGen/IntrinsicEmitter.cpp
+++ llvm/utils/TableGen/IntrinsicEmitter.cpp
@@ -250,7 +250,8 @@
IIT_STRUCT9 = 49,
IIT_V256 = 50,
IIT_AMX = 51,
- IIT_PPCF128 = 52
+ IIT_PPCF128 = 52,
+ IIT_V3 = 53,
};
static void EncodeFixedValueType(MVT::SimpleValueType VT,
@@ -384,6 +385,7 @@
default: PrintFatalError("unhandled vector type width in intrinsic!");
case 1: Sig.push_back(IIT_V1); break;
case 2: Sig.push_back(IIT_V2); break;
+ case 3: Sig.push_back(IIT_V3); break;
case 4: Sig.push_back(IIT_V4); break;
case 8: Sig.push_back(IIT_V8); break;
case 16: Sig.push_back(IIT_V16); break;
Index: llvm/lib/IR/Function.cpp
===================================================================
--- llvm/lib/IR/Function.cpp
+++ llvm/lib/IR/Function.cpp
@@ -980,7 +980,8 @@
IIT_STRUCT9 = 49,
IIT_V256 = 50,
IIT_AMX = 51,
- IIT_PPCF128 = 52
+ IIT_PPCF128 = 52,
+ IIT_V3 = 53,
};
static void DecodeIITType(unsigned &NextElt, ArrayRef<unsigned char> Infos,
@@ -1056,6 +1057,10 @@
OutputTable.push_back(IITDescriptor::getVector(2, IsScalableVector));
DecodeIITType(NextElt, Infos, Info, OutputTable);
return;
+ case IIT_V3:
+ OutputTable.push_back(IITDescriptor::getVector(3, IsScalableVector));
+ DecodeIITType(NextElt, Infos, Info, OutputTable);
+ return;
case IIT_V4:
OutputTable.push_back(IITDescriptor::getVector(4, IsScalableVector));
DecodeIITType(NextElt, Infos, Info, OutputTable);
Index: llvm/include/llvm/IR/Intrinsics.td
===================================================================
--- llvm/include/llvm/IR/Intrinsics.td
+++ llvm/include/llvm/IR/Intrinsics.td
@@ -319,6 +319,7 @@
def llvm_v8bf16_ty : LLVMType<v8bf16>; // 8 x bfloat (__bf16)
def llvm_v1f32_ty : LLVMType<v1f32>; // 1 x float
def llvm_v2f32_ty : LLVMType<v2f32>; // 2 x float
+def llvm_v3f32_ty : LLVMType<v3f32>; // 3 x float
def llvm_v4f32_ty : LLVMType<v4f32>; // 4 x float
def llvm_v8f32_ty : LLVMType<v8f32>; // 8 x float
def llvm_v16f32_ty : LLVMType<v16f32>; // 16 x float
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