[llvm] e629302 - [ARM] Correct range in isLegalAddressImm

David Green via llvm-commits llvm-commits at lists.llvm.org
Thu Dec 2 03:33:45 PST 2021


Author: David Green
Date: 2021-12-02T11:33:40Z
New Revision: e62930255822f86c5b422a0d61bbfc77324de3a9

URL: https://github.com/llvm/llvm-project/commit/e62930255822f86c5b422a0d61bbfc77324de3a9
DIFF: https://github.com/llvm/llvm-project/commit/e62930255822f86c5b422a0d61bbfc77324de3a9.diff

LOG: [ARM] Correct range in isLegalAddressImm

The ranges in isLegalAddressImm were off by one, not allowing the
maximum values for unscaled offsets.

Differential Revision: https://reviews.llvm.org/D114636

Added: 
    

Modified: 
    llvm/lib/Target/ARM/ARMBaseInstrInfo.h
    llvm/test/CodeGen/Thumb2/store-prepostinc.mir

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.h b/llvm/lib/Target/ARM/ARMBaseInstrInfo.h
index e2c250417afed..0cb397819b6d9 100644
--- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.h
+++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.h
@@ -879,19 +879,19 @@ inline bool isLegalAddressImm(unsigned Opcode, int Imm,
   unsigned AddrMode = (Desc.TSFlags & ARMII::AddrModeMask);
   switch (AddrMode) {
   case ARMII::AddrModeT2_i7:
-    return std::abs(Imm) < (((1 << 7) * 1) - 1);
+    return std::abs(Imm) < ((1 << 7) * 1);
   case ARMII::AddrModeT2_i7s2:
-    return std::abs(Imm) < (((1 << 7) * 2) - 1) && Imm % 2 == 0;
+    return std::abs(Imm) < ((1 << 7) * 2) && Imm % 2 == 0;
   case ARMII::AddrModeT2_i7s4:
-    return std::abs(Imm) < (((1 << 7) * 4) - 1) && Imm % 4 == 0;
+    return std::abs(Imm) < ((1 << 7) * 4) && Imm % 4 == 0;
   case ARMII::AddrModeT2_i8:
-    return std::abs(Imm) < (((1 << 8) * 1) - 1);
-  case ARMII::AddrMode2:
-    return std::abs(Imm) < (((1 << 12) * 1) - 1);
-  case ARMII::AddrModeT2_i12:
-    return Imm >= 0 && Imm < (((1 << 12) * 1) - 1);
+    return std::abs(Imm) < ((1 << 8) * 1);
   case ARMII::AddrModeT2_i8s4:
-    return std::abs(Imm) < (((1 << 8) * 4) - 1) && Imm % 4 == 0;
+    return std::abs(Imm) < ((1 << 8) * 4) && Imm % 4 == 0;
+  case ARMII::AddrModeT2_i12:
+    return Imm >= 0 && Imm < ((1 << 12) * 1);
+  case ARMII::AddrMode2:
+    return std::abs(Imm) < ((1 << 12) * 1);
   default:
     llvm_unreachable("Unhandled Addressing mode");
   }

diff  --git a/llvm/test/CodeGen/Thumb2/store-prepostinc.mir b/llvm/test/CodeGen/Thumb2/store-prepostinc.mir
index 0adf8f7c922b8..aa46dc607148b 100644
--- a/llvm/test/CodeGen/Thumb2/store-prepostinc.mir
+++ b/llvm/test/CodeGen/Thumb2/store-prepostinc.mir
@@ -460,8 +460,7 @@ body:             |
     ; CHECK-LABEL: name: STR_post255
     ; CHECK: liveins: $r0, $r1
     ; CHECK-NEXT: {{  $}}
-    ; CHECK-NEXT: t2STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
-    ; CHECK-NEXT: renamable $r0 = nuw t2ADDri killed renamable $r0, 255, 14 /* CC::al */, $noreg, $noreg
+    ; CHECK-NEXT: early-clobber $r0 = t2STR_POST killed $r1, $r0, 255, 14 /* CC::al */, $noreg :: (store (s32))
     ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
     t2STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
     renamable $r0 = nuw t2ADDri killed renamable $r0, 255, 14 /* CC::al */, $noreg, $noreg


        


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