[llvm] 73c50cc - [ARM] Add additional postinc distribute tests and regenerate tests. NFC
David Green via llvm-commits
llvm-commits at lists.llvm.org
Thu Dec 2 02:40:15 PST 2021
Author: David Green
Date: 2021-12-02T10:40:10Z
New Revision: 73c50ccf7a6bf82eb6a7d19510e9f7315d471c57
URL: https://github.com/llvm/llvm-project/commit/73c50ccf7a6bf82eb6a7d19510e9f7315d471c57
DIFF: https://github.com/llvm/llvm-project/commit/73c50ccf7a6bf82eb6a7d19510e9f7315d471c57.diff
LOG: [ARM] Add additional postinc distribute tests and regenerate tests. NFC
Added:
Modified:
llvm/test/CodeGen/Thumb2/postinc-distribute.mir
llvm/test/CodeGen/Thumb2/store-prepostinc.mir
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/Thumb2/postinc-distribute.mir b/llvm/test/CodeGen/Thumb2/postinc-distribute.mir
index e5a0b7bf3a025..581ba9395efdf 100644
--- a/llvm/test/CodeGen/Thumb2/postinc-distribute.mir
+++ b/llvm/test/CodeGen/Thumb2/postinc-distribute.mir
@@ -1,5 +1,5 @@
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve.fp -run-pass arm-prera-ldst-opt %s -o - | FileCheck %s
+# RUN: llc -mtriple=thumbv8.1m.main-none-none-eabi -mattr=+mve.fp -run-pass arm-prera-ldst-opt %s -o - -verify-machineinstrs | FileCheck %s
--- |
define i32* @t2LDRi12(i32* %x, i32 %y) { unreachable }
@@ -15,6 +15,19 @@
define i32* @minsize2(i32* %x, i32 %y) minsize optsize { unreachable }
define i32* @minsize3(i32* %x, i32 %y) minsize optsize { unreachable }
+ define i32* @t2LDRi12_posoff(i32* %x, i32 %y) { unreachable }
+ define i32* @t2LDRHi12_posoff(i32* %x, i32 %y) { unreachable }
+ define i32* @t2LDRBi12_posoff(i32* %x, i32 %y) { unreachable }
+ define i32* @t2STRi12_posoff(i32* %x, i32 %y) { unreachable }
+ define i32* @t2STRHi12_posoff(i32* %x, i32 %y) { unreachable }
+ define i32* @t2STRBi12_posoff(i32* %x, i32 %y) { unreachable }
+ define i32* @t2LDRi12_negoff(i32* %x, i32 %y) { unreachable }
+ define i32* @t2LDRHi12_negoff(i32* %x, i32 %y) { unreachable }
+ define i32* @t2LDRBi12_negoff(i32* %x, i32 %y) { unreachable }
+ define i32* @t2STRi12_negoff(i32* %x, i32 %y) { unreachable }
+ define i32* @t2STRHi12_negoff(i32* %x, i32 %y) { unreachable }
+ define i32* @t2STRBi12_negoff(i32* %x, i32 %y) { unreachable }
+
...
---
name: t2LDRi12
@@ -31,11 +44,12 @@ body: |
; CHECK-LABEL: name: t2LDRi12
; CHECK: liveins: $r0
- ; CHECK: [[COPY:%[0-9]+]]:gprnopc = COPY $r0
- ; CHECK: [[t2LDRi12_:%[0-9]+]]:rgpr = t2LDRi12 [[COPY]], 0, 14 /* CC::al */, $noreg :: (load (s32))
- ; CHECK: [[t2ADDri:%[0-9]+]]:rgpr = nuw t2ADDri [[COPY]], 32, 14 /* CC::al */, $noreg, $noreg
- ; CHECK: $r0 = COPY [[t2ADDri]]
- ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gprnopc = COPY $r0
+ ; CHECK-NEXT: [[t2LDRi12_:%[0-9]+]]:rgpr = t2LDRi12 [[COPY]], 0, 14 /* CC::al */, $noreg :: (load (s32))
+ ; CHECK-NEXT: [[t2ADDri:%[0-9]+]]:rgpr = nuw t2ADDri [[COPY]], 32, 14 /* CC::al */, $noreg, $noreg
+ ; CHECK-NEXT: $r0 = COPY [[t2ADDri]]
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
%0:gprnopc = COPY $r0
%1:rgpr = t2LDRi12 %0, 0, 14, $noreg :: (load (s32), align 4)
%2:rgpr = nuw t2ADDri %0, 32, 14, $noreg, $noreg
@@ -58,10 +72,11 @@ body: |
; CHECK-LABEL: name: t2LDRHi12
; CHECK: liveins: $r0
- ; CHECK: [[COPY:%[0-9]+]]:gprnopc = COPY $r0
- ; CHECK: [[t2LDRH_POST:%[0-9]+]]:rgpr, [[t2LDRH_POST1:%[0-9]+]]:rgpr = t2LDRH_POST [[COPY]], 32, 14 /* CC::al */, $noreg :: (load (s32))
- ; CHECK: $r0 = COPY [[t2LDRH_POST1]]
- ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gprnopc = COPY $r0
+ ; CHECK-NEXT: [[t2LDRH_POST:%[0-9]+]]:rgpr, [[t2LDRH_POST1:%[0-9]+]]:rgpr = t2LDRH_POST [[COPY]], 32, 14 /* CC::al */, $noreg :: (load (s32))
+ ; CHECK-NEXT: $r0 = COPY [[t2LDRH_POST1]]
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
%0:gprnopc = COPY $r0
%1:rgpr = t2LDRHi12 %0, 0, 14, $noreg :: (load (s32), align 4)
%2:rgpr = nuw t2ADDri %0, 32, 14, $noreg, $noreg
@@ -84,10 +99,11 @@ body: |
; CHECK-LABEL: name: t2LDRSHi12
; CHECK: liveins: $r0
- ; CHECK: [[COPY:%[0-9]+]]:gprnopc = COPY $r0
- ; CHECK: [[t2LDRSH_POST:%[0-9]+]]:rgpr, [[t2LDRSH_POST1:%[0-9]+]]:rgpr = t2LDRSH_POST [[COPY]], 32, 14 /* CC::al */, $noreg :: (load (s32))
- ; CHECK: $r0 = COPY [[t2LDRSH_POST1]]
- ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gprnopc = COPY $r0
+ ; CHECK-NEXT: [[t2LDRSH_POST:%[0-9]+]]:rgpr, [[t2LDRSH_POST1:%[0-9]+]]:rgpr = t2LDRSH_POST [[COPY]], 32, 14 /* CC::al */, $noreg :: (load (s32))
+ ; CHECK-NEXT: $r0 = COPY [[t2LDRSH_POST1]]
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
%0:gprnopc = COPY $r0
%1:rgpr = t2LDRSHi12 %0, 0, 14, $noreg :: (load (s32), align 4)
%2:rgpr = nuw t2ADDri %0, 32, 14, $noreg, $noreg
@@ -110,10 +126,11 @@ body: |
; CHECK-LABEL: name: t2LDRBi12
; CHECK: liveins: $r0
- ; CHECK: [[COPY:%[0-9]+]]:gprnopc = COPY $r0
- ; CHECK: [[t2LDRB_POST:%[0-9]+]]:rgpr, [[t2LDRB_POST1:%[0-9]+]]:rgpr = t2LDRB_POST [[COPY]], 32, 14 /* CC::al */, $noreg :: (load (s32))
- ; CHECK: $r0 = COPY [[t2LDRB_POST1]]
- ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gprnopc = COPY $r0
+ ; CHECK-NEXT: [[t2LDRB_POST:%[0-9]+]]:rgpr, [[t2LDRB_POST1:%[0-9]+]]:rgpr = t2LDRB_POST [[COPY]], 32, 14 /* CC::al */, $noreg :: (load (s32))
+ ; CHECK-NEXT: $r0 = COPY [[t2LDRB_POST1]]
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
%0:gprnopc = COPY $r0
%1:rgpr = t2LDRBi12 %0, 0, 14, $noreg :: (load (s32), align 4)
%2:rgpr = nuw t2ADDri %0, 32, 14, $noreg, $noreg
@@ -136,10 +153,11 @@ body: |
; CHECK-LABEL: name: t2LDRSBi12
; CHECK: liveins: $r0
- ; CHECK: [[COPY:%[0-9]+]]:gprnopc = COPY $r0
- ; CHECK: [[t2LDRSB_POST:%[0-9]+]]:rgpr, [[t2LDRSB_POST1:%[0-9]+]]:rgpr = t2LDRSB_POST [[COPY]], 32, 14 /* CC::al */, $noreg :: (load (s32))
- ; CHECK: $r0 = COPY [[t2LDRSB_POST1]]
- ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gprnopc = COPY $r0
+ ; CHECK-NEXT: [[t2LDRSB_POST:%[0-9]+]]:rgpr, [[t2LDRSB_POST1:%[0-9]+]]:rgpr = t2LDRSB_POST [[COPY]], 32, 14 /* CC::al */, $noreg :: (load (s32))
+ ; CHECK-NEXT: $r0 = COPY [[t2LDRSB_POST1]]
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
%0:gprnopc = COPY $r0
%1:rgpr = t2LDRSBi12 %0, 0, 14, $noreg :: (load (s32), align 4)
%2:rgpr = nuw t2ADDri %0, 32, 14, $noreg, $noreg
@@ -163,12 +181,13 @@ body: |
; CHECK-LABEL: name: t2STRi12
; CHECK: liveins: $r0, $r1
- ; CHECK: [[COPY:%[0-9]+]]:gprnopc = COPY $r0
- ; CHECK: [[COPY1:%[0-9]+]]:rgpr = COPY $r1
- ; CHECK: t2STRi12 [[COPY1]], [[COPY]], 0, 14 /* CC::al */, $noreg :: (store (s32))
- ; CHECK: [[t2ADDri:%[0-9]+]]:rgpr = nuw t2ADDri [[COPY]], 32, 14 /* CC::al */, $noreg, $noreg
- ; CHECK: $r0 = COPY [[t2ADDri]]
- ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gprnopc = COPY $r0
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:rgpr = COPY $r1
+ ; CHECK-NEXT: t2STRi12 [[COPY1]], [[COPY]], 0, 14 /* CC::al */, $noreg :: (store (s32))
+ ; CHECK-NEXT: [[t2ADDri:%[0-9]+]]:rgpr = nuw t2ADDri [[COPY]], 32, 14 /* CC::al */, $noreg, $noreg
+ ; CHECK-NEXT: $r0 = COPY [[t2ADDri]]
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
%0:gprnopc = COPY $r0
%1:rgpr = COPY $r1
t2STRi12 %1:rgpr, %0, 0, 14, $noreg :: (store (s32), align 4)
@@ -193,11 +212,12 @@ body: |
; CHECK-LABEL: name: t2STRHi12
; CHECK: liveins: $r0, $r1
- ; CHECK: [[COPY:%[0-9]+]]:gprnopc = COPY $r0
- ; CHECK: [[COPY1:%[0-9]+]]:rgpr = COPY $r1
- ; CHECK: early-clobber %2:rgpr = t2STRH_POST [[COPY1]], [[COPY]], 32, 14 /* CC::al */, $noreg :: (store (s32))
- ; CHECK: $r0 = COPY %2
- ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gprnopc = COPY $r0
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:rgpr = COPY $r1
+ ; CHECK-NEXT: early-clobber %2:rgpr = t2STRH_POST [[COPY1]], [[COPY]], 32, 14 /* CC::al */, $noreg :: (store (s32))
+ ; CHECK-NEXT: $r0 = COPY %2
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
%0:gprnopc = COPY $r0
%1:rgpr = COPY $r1
t2STRHi12 %1:rgpr, %0, 0, 14, $noreg :: (store (s32), align 4)
@@ -222,11 +242,12 @@ body: |
; CHECK-LABEL: name: t2STRBi12
; CHECK: liveins: $r0, $r1
- ; CHECK: [[COPY:%[0-9]+]]:gprnopc = COPY $r0
- ; CHECK: [[COPY1:%[0-9]+]]:rgpr = COPY $r1
- ; CHECK: early-clobber %2:rgpr = t2STRB_POST [[COPY1]], [[COPY]], 32, 14 /* CC::al */, $noreg :: (store (s32))
- ; CHECK: $r0 = COPY %2
- ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gprnopc = COPY $r0
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:rgpr = COPY $r1
+ ; CHECK-NEXT: early-clobber %2:rgpr = t2STRB_POST [[COPY1]], [[COPY]], 32, 14 /* CC::al */, $noreg :: (store (s32))
+ ; CHECK-NEXT: $r0 = COPY %2
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
%0:gprnopc = COPY $r0
%1:rgpr = COPY $r1
t2STRBi12 %1:rgpr, %0, 0, 14, $noreg :: (store (s32), align 4)
@@ -249,11 +270,12 @@ body: |
; CHECK-LABEL: name: storedadd
; CHECK: liveins: $r0
- ; CHECK: [[COPY:%[0-9]+]]:gprnopc = COPY $r0
- ; CHECK: [[t2ADDri:%[0-9]+]]:rgpr = nuw t2ADDri [[COPY]], 32, 14 /* CC::al */, $noreg, $noreg
- ; CHECK: t2STRi12 [[t2ADDri]], [[COPY]], 0, 14 /* CC::al */, $noreg :: (store (s32))
- ; CHECK: $r0 = COPY [[t2ADDri]]
- ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gprnopc = COPY $r0
+ ; CHECK-NEXT: [[t2ADDri:%[0-9]+]]:rgpr = nuw t2ADDri [[COPY]], 32, 14 /* CC::al */, $noreg, $noreg
+ ; CHECK-NEXT: t2STRi12 [[t2ADDri]], [[COPY]], 0, 14 /* CC::al */, $noreg :: (store (s32))
+ ; CHECK-NEXT: $r0 = COPY [[t2ADDri]]
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
%0:gprnopc = COPY $r0
%1:rgpr = nuw t2ADDri %0, 32, 14, $noreg, $noreg
t2STRi12 %1, %0, 0, 14, $noreg :: (store (s32), align 4)
@@ -277,11 +299,12 @@ body: |
; CHECK-LABEL: name: minsize2
; CHECK: liveins: $r0
- ; CHECK: [[COPY:%[0-9]+]]:gprnopc = COPY $r0
- ; CHECK: [[t2LDRB_POST:%[0-9]+]]:rgpr, [[t2LDRB_POST1:%[0-9]+]]:rgpr = t2LDRB_POST [[COPY]], 32, 14 /* CC::al */, $noreg :: (load (s32))
- ; CHECK: [[t2LDRBi8_:%[0-9]+]]:rgpr = t2LDRBi8 [[t2LDRB_POST1]], -30, 14 /* CC::al */, $noreg :: (load (s32))
- ; CHECK: $r0 = COPY [[t2LDRB_POST1]]
- ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gprnopc = COPY $r0
+ ; CHECK-NEXT: [[t2LDRB_POST:%[0-9]+]]:rgpr, [[t2LDRB_POST1:%[0-9]+]]:rgpr = t2LDRB_POST [[COPY]], 32, 14 /* CC::al */, $noreg :: (load (s32))
+ ; CHECK-NEXT: [[t2LDRBi8_:%[0-9]+]]:rgpr = t2LDRBi8 [[t2LDRB_POST1]], -30, 14 /* CC::al */, $noreg :: (load (s32))
+ ; CHECK-NEXT: $r0 = COPY [[t2LDRB_POST1]]
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
%0:gprnopc = COPY $r0
%1:rgpr = t2LDRBi12 %0, 0, 14, $noreg :: (load (s32), align 4)
%3:rgpr = t2LDRBi12 %0, 2, 14, $noreg :: (load (s32), align 4)
@@ -307,13 +330,14 @@ body: |
; CHECK-LABEL: name: minsize3
; CHECK: liveins: $r0
- ; CHECK: [[COPY:%[0-9]+]]:gprnopc = COPY $r0
- ; CHECK: [[t2LDRBi12_:%[0-9]+]]:rgpr = t2LDRBi12 [[COPY]], 0, 14 /* CC::al */, $noreg :: (load (s32))
- ; CHECK: [[t2LDRBi12_1:%[0-9]+]]:rgpr = t2LDRBi12 [[COPY]], 2, 14 /* CC::al */, $noreg :: (load (s32))
- ; CHECK: [[t2LDRBi12_2:%[0-9]+]]:rgpr = t2LDRBi12 [[COPY]], 4, 14 /* CC::al */, $noreg :: (load (s32))
- ; CHECK: [[t2ADDri:%[0-9]+]]:rgpr = nuw t2ADDri [[COPY]], 32, 14 /* CC::al */, $noreg, $noreg
- ; CHECK: $r0 = COPY [[t2ADDri]]
- ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gprnopc = COPY $r0
+ ; CHECK-NEXT: [[t2LDRBi12_:%[0-9]+]]:rgpr = t2LDRBi12 [[COPY]], 0, 14 /* CC::al */, $noreg :: (load (s32))
+ ; CHECK-NEXT: [[t2LDRBi12_1:%[0-9]+]]:rgpr = t2LDRBi12 [[COPY]], 2, 14 /* CC::al */, $noreg :: (load (s32))
+ ; CHECK-NEXT: [[t2LDRBi12_2:%[0-9]+]]:rgpr = t2LDRBi12 [[COPY]], 4, 14 /* CC::al */, $noreg :: (load (s32))
+ ; CHECK-NEXT: [[t2ADDri:%[0-9]+]]:rgpr = nuw t2ADDri [[COPY]], 32, 14 /* CC::al */, $noreg, $noreg
+ ; CHECK-NEXT: $r0 = COPY [[t2ADDri]]
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
%0:gprnopc = COPY $r0
%1:rgpr = t2LDRBi12 %0, 0, 14, $noreg :: (load (s32), align 4)
%3:rgpr = t2LDRBi12 %0, 2, 14, $noreg :: (load (s32), align 4)
@@ -323,3 +347,421 @@ body: |
tBX_RET 14, $noreg, implicit $r0
...
+---
+name: t2LDRi12_posoff
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: gprnopc, preferred-register: '' }
+ - { id: 1, class: rgpr, preferred-register: '' }
+ - { id: 2, class: rgpr, preferred-register: '' }
+ - { id: 3, class: rgpr, preferred-register: '' }
+ - { id: 4, class: rgpr, preferred-register: '' }
+liveins:
+ - { reg: '$r0', virtual-reg: '%0' }
+body: |
+ bb.0:
+ liveins: $r0
+
+ ; CHECK-LABEL: name: t2LDRi12_posoff
+ ; CHECK: liveins: $r0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gprnopc = COPY $r0
+ ; CHECK-NEXT: [[t2LDRi12_:%[0-9]+]]:rgpr = t2LDRi12 [[COPY]], 0, 14 /* CC::al */, $noreg :: (load (s32))
+ ; CHECK-NEXT: [[t2LDRi12_1:%[0-9]+]]:rgpr = t2LDRi12 [[COPY]], 4, 14 /* CC::al */, $noreg :: (load (s32))
+ ; CHECK-NEXT: [[t2ADDri:%[0-9]+]]:rgpr = nuw t2ADDri [[COPY]], 32, 14 /* CC::al */, $noreg, $noreg
+ ; CHECK-NEXT: [[t2LDRi8_:%[0-9]+]]:rgpr = t2LDRi8 [[COPY]], -8, 14 /* CC::al */, $noreg :: (load (s32))
+ ; CHECK-NEXT: $r0 = COPY [[t2ADDri]]
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ %0:gprnopc = COPY $r0
+ %1:rgpr = t2LDRi12 %0, 0, 14, $noreg :: (load (s32), align 4)
+ %2:rgpr = nuw t2ADDri %0, 32, 14, $noreg, $noreg
+ %3:rgpr = t2LDRi12 %0, 4, 14, $noreg :: (load (s32), align 4)
+ %4:rgpr = t2LDRi8 %0, -8, 14, $noreg :: (load (s32), align 4)
+ $r0 = COPY %2
+ tBX_RET 14, $noreg, implicit $r0
+
+...
+---
+name: t2LDRHi12_posoff
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: gprnopc, preferred-register: '' }
+ - { id: 1, class: rgpr, preferred-register: '' }
+ - { id: 2, class: rgpr, preferred-register: '' }
+ - { id: 3, class: rgpr, preferred-register: '' }
+ - { id: 4, class: rgpr, preferred-register: '' }
+ - { id: 5, class: rgpr, preferred-register: '' }
+liveins:
+ - { reg: '$r0', virtual-reg: '%0' }
+body: |
+ bb.0:
+ liveins: $r0
+
+ ; CHECK-LABEL: name: t2LDRHi12_posoff
+ ; CHECK: liveins: $r0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gprnopc = COPY $r0
+ ; CHECK-NEXT: [[t2LDRH_POST:%[0-9]+]]:rgpr, [[t2LDRH_POST1:%[0-9]+]]:rgpr = t2LDRH_POST [[COPY]], 32, 14 /* CC::al */, $noreg :: (load (s32))
+ ; CHECK-NEXT: [[t2LDRHi8_:%[0-9]+]]:rgpr = t2LDRHi8 [[t2LDRH_POST1]], -28, 14 /* CC::al */, $noreg :: (load (s32))
+ ; CHECK-NEXT: [[t2LDRHi8_1:%[0-9]+]]:rgpr = t2LDRHi8 [[t2LDRH_POST1]], -40, 14 /* CC::al */, $noreg :: (load (s32))
+ ; CHECK-NEXT: [[t2LDRSHi8_:%[0-9]+]]:rgpr = t2LDRSHi8 [[t2LDRH_POST1]], -20, 14 /* CC::al */, $noreg :: (load (s32))
+ ; CHECK-NEXT: $r0 = COPY [[t2LDRH_POST1]]
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ %0:gprnopc = COPY $r0
+ %1:rgpr = t2LDRHi12 %0, 0, 14, $noreg :: (load (s32), align 4)
+ %2:rgpr = nuw t2ADDri %0, 32, 14, $noreg, $noreg
+ %3:rgpr = t2LDRHi12 %0, 4, 14, $noreg :: (load (s32), align 4)
+ %4:rgpr = t2LDRHi8 %0, -8, 14, $noreg :: (load (s32), align 4)
+ %5:rgpr = t2LDRSHi12 %0, 12, 14, $noreg :: (load (s32), align 4)
+ $r0 = COPY %2
+ tBX_RET 14, $noreg, implicit $r0
+
+...
+---
+name: t2LDRBi12_posoff
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: gprnopc, preferred-register: '' }
+ - { id: 1, class: rgpr, preferred-register: '' }
+ - { id: 2, class: rgpr, preferred-register: '' }
+ - { id: 3, class: rgpr, preferred-register: '' }
+ - { id: 4, class: rgpr, preferred-register: '' }
+ - { id: 5, class: rgpr, preferred-register: '' }
+liveins:
+ - { reg: '$r0', virtual-reg: '%0' }
+body: |
+ bb.0:
+ liveins: $r0
+
+ ; CHECK-LABEL: name: t2LDRBi12_posoff
+ ; CHECK: liveins: $r0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gprnopc = COPY $r0
+ ; CHECK-NEXT: [[t2LDRB_POST:%[0-9]+]]:rgpr, [[t2LDRB_POST1:%[0-9]+]]:rgpr = t2LDRB_POST [[COPY]], 32, 14 /* CC::al */, $noreg :: (load (s32))
+ ; CHECK-NEXT: [[t2LDRBi8_:%[0-9]+]]:rgpr = t2LDRBi8 [[t2LDRB_POST1]], -28, 14 /* CC::al */, $noreg :: (load (s32))
+ ; CHECK-NEXT: [[t2LDRBi8_1:%[0-9]+]]:rgpr = t2LDRBi8 [[t2LDRB_POST1]], -40, 14 /* CC::al */, $noreg :: (load (s32))
+ ; CHECK-NEXT: [[t2LDRSBi8_:%[0-9]+]]:rgpr = t2LDRSBi8 [[t2LDRB_POST1]], -20, 14 /* CC::al */, $noreg :: (load (s32))
+ ; CHECK-NEXT: $r0 = COPY [[t2LDRB_POST1]]
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ %0:gprnopc = COPY $r0
+ %1:rgpr = t2LDRBi12 %0, 0, 14, $noreg :: (load (s32), align 4)
+ %2:rgpr = nuw t2ADDri %0, 32, 14, $noreg, $noreg
+ %3:rgpr = t2LDRBi12 %0, 4, 14, $noreg :: (load (s32), align 4)
+ %4:rgpr = t2LDRBi8 %0, -8, 14, $noreg :: (load (s32), align 4)
+ %12:rgpr = t2LDRSBi12 %0, 12, 14, $noreg :: (load (s32), align 4)
+ $r0 = COPY %2
+ tBX_RET 14, $noreg, implicit $r0
+
+...
+---
+name: t2STRi12_posoff
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: gprnopc, preferred-register: '' }
+ - { id: 1, class: rgpr, preferred-register: '' }
+ - { id: 2, class: rgpr, preferred-register: '' }
+liveins:
+ - { reg: '$r0', virtual-reg: '%0' }
+ - { reg: '$r1', virtual-reg: '%1' }
+body: |
+ bb.0:
+ liveins: $r0, $r1
+
+ ; CHECK-LABEL: name: t2STRi12_posoff
+ ; CHECK: liveins: $r0, $r1
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gprnopc = COPY $r0
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:rgpr = COPY $r1
+ ; CHECK-NEXT: [[t2ADDri:%[0-9]+]]:rgpr = nuw t2ADDri [[COPY]], 32, 14 /* CC::al */, $noreg, $noreg
+ ; CHECK-NEXT: t2STRi12 [[COPY1]], [[COPY]], 0, 14 /* CC::al */, $noreg :: (store (s32))
+ ; CHECK-NEXT: t2STRi12 [[COPY1]], [[COPY]], 4, 14 /* CC::al */, $noreg :: (store (s32))
+ ; CHECK-NEXT: t2STRi8 [[COPY1]], [[COPY]], -8, 14 /* CC::al */, $noreg :: (store (s32))
+ ; CHECK-NEXT: $r0 = COPY [[t2ADDri]]
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ %0:gprnopc = COPY $r0
+ %1:rgpr = COPY $r1
+ t2STRi12 %1:rgpr, %0, 0, 14, $noreg :: (store (s32), align 4)
+ %2:rgpr = nuw t2ADDri %0, 32, 14, $noreg, $noreg
+ t2STRi12 %1:rgpr, %0, 4, 14, $noreg :: (store (s32), align 4)
+ t2STRi8 %1:rgpr, %0, -8, 14, $noreg :: (store (s32), align 4)
+ $r0 = COPY %2
+ tBX_RET 14, $noreg, implicit $r0
+
+...
+---
+name: t2STRHi12_posoff
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: gprnopc, preferred-register: '' }
+ - { id: 1, class: rgpr, preferred-register: '' }
+ - { id: 2, class: rgpr, preferred-register: '' }
+liveins:
+ - { reg: '$r0', virtual-reg: '%0' }
+ - { reg: '$r1', virtual-reg: '%1' }
+body: |
+ bb.0:
+ liveins: $r0, $r1
+
+ ; CHECK-LABEL: name: t2STRHi12_posoff
+ ; CHECK: liveins: $r0, $r1
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gprnopc = COPY $r0
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:rgpr = COPY $r1
+ ; CHECK-NEXT: early-clobber %2:rgpr = t2STRH_POST [[COPY1]], [[COPY]], 32, 14 /* CC::al */, $noreg :: (store (s32))
+ ; CHECK-NEXT: t2STRHi8 [[COPY1]], %2, -28, 14 /* CC::al */, $noreg :: (store (s32))
+ ; CHECK-NEXT: t2STRHi8 [[COPY1]], %2, -40, 14 /* CC::al */, $noreg :: (store (s32))
+ ; CHECK-NEXT: $r0 = COPY %2
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ %0:gprnopc = COPY $r0
+ %1:rgpr = COPY $r1
+ t2STRHi12 %1:rgpr, %0, 0, 14, $noreg :: (store (s32), align 4)
+ %2:rgpr = nuw t2ADDri %0, 32, 14, $noreg, $noreg
+ t2STRHi12 %1:rgpr, %0, 4, 14, $noreg :: (store (s32), align 4)
+ t2STRHi8 %1:rgpr, %0, -8, 14, $noreg :: (store (s32), align 4)
+ $r0 = COPY %2
+ tBX_RET 14, $noreg, implicit $r0
+
+...
+---
+name: t2STRBi12_posoff
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: gprnopc, preferred-register: '' }
+ - { id: 1, class: rgpr, preferred-register: '' }
+ - { id: 2, class: rgpr, preferred-register: '' }
+liveins:
+ - { reg: '$r0', virtual-reg: '%0' }
+ - { reg: '$r1', virtual-reg: '%1' }
+body: |
+ bb.0:
+ liveins: $r0, $r1
+
+ ; CHECK-LABEL: name: t2STRBi12_posoff
+ ; CHECK: liveins: $r0, $r1
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gprnopc = COPY $r0
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:rgpr = COPY $r1
+ ; CHECK-NEXT: early-clobber %2:rgpr = t2STRB_POST [[COPY1]], [[COPY]], 32, 14 /* CC::al */, $noreg :: (store (s32))
+ ; CHECK-NEXT: t2STRBi8 [[COPY1]], %2, -28, 14 /* CC::al */, $noreg :: (store (s32))
+ ; CHECK-NEXT: t2STRBi8 [[COPY1]], %2, -40, 14 /* CC::al */, $noreg :: (store (s32))
+ ; CHECK-NEXT: $r0 = COPY %2
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ %0:gprnopc = COPY $r0
+ %1:rgpr = COPY $r1
+ t2STRBi12 %1:rgpr, %0, 0, 14, $noreg :: (store (s32), align 4)
+ %2:rgpr = nuw t2ADDri %0, 32, 14, $noreg, $noreg
+ t2STRBi12 %1:rgpr, %0, 4, 14, $noreg :: (store (s32), align 4)
+ t2STRBi8 %1:rgpr, %0, -8, 14, $noreg :: (store (s32), align 4)
+ $r0 = COPY %2
+ tBX_RET 14, $noreg, implicit $r0
+
+...
+---
+name: t2LDRi12_negoff
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: gprnopc, preferred-register: '' }
+ - { id: 1, class: rgpr, preferred-register: '' }
+ - { id: 2, class: rgpr, preferred-register: '' }
+ - { id: 3, class: rgpr, preferred-register: '' }
+ - { id: 4, class: rgpr, preferred-register: '' }
+liveins:
+ - { reg: '$r0', virtual-reg: '%0' }
+body: |
+ bb.0:
+ liveins: $r0
+
+ ; CHECK-LABEL: name: t2LDRi12_negoff
+ ; CHECK: liveins: $r0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gprnopc = COPY $r0
+ ; CHECK-NEXT: [[t2LDRi12_:%[0-9]+]]:rgpr = t2LDRi12 [[COPY]], 0, 14 /* CC::al */, $noreg :: (load (s32))
+ ; CHECK-NEXT: [[t2LDRi12_1:%[0-9]+]]:rgpr = t2LDRi12 [[COPY]], 4, 14 /* CC::al */, $noreg :: (load (s32))
+ ; CHECK-NEXT: [[t2SUBri:%[0-9]+]]:rgpr = nuw t2SUBri [[COPY]], 32, 14 /* CC::al */, $noreg, $noreg
+ ; CHECK-NEXT: [[t2LDRi8_:%[0-9]+]]:rgpr = t2LDRi8 [[COPY]], -8, 14 /* CC::al */, $noreg :: (load (s32))
+ ; CHECK-NEXT: $r0 = COPY [[t2SUBri]]
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ %0:gprnopc = COPY $r0
+ %1:rgpr = t2LDRi12 %0, 0, 14, $noreg :: (load (s32), align 4)
+ %2:rgpr = nuw t2SUBri %0, 32, 14, $noreg, $noreg
+ %3:rgpr = t2LDRi12 %0, 4, 14, $noreg :: (load (s32), align 4)
+ %4:rgpr = t2LDRi8 %0, -8, 14, $noreg :: (load (s32), align 4)
+ $r0 = COPY %2
+ tBX_RET 14, $noreg, implicit $r0
+
+...
+---
+name: t2LDRHi12_negoff
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: gprnopc, preferred-register: '' }
+ - { id: 1, class: rgpr, preferred-register: '' }
+ - { id: 2, class: rgpr, preferred-register: '' }
+ - { id: 3, class: rgpr, preferred-register: '' }
+ - { id: 4, class: rgpr, preferred-register: '' }
+ - { id: 5, class: rgpr, preferred-register: '' }
+liveins:
+ - { reg: '$r0', virtual-reg: '%0' }
+body: |
+ bb.0:
+ liveins: $r0
+
+ ; CHECK-LABEL: name: t2LDRHi12_negoff
+ ; CHECK: liveins: $r0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gprnopc = COPY $r0
+ ; CHECK-NEXT: [[t2LDRH_POST:%[0-9]+]]:rgpr, [[t2LDRH_POST1:%[0-9]+]]:rgpr = t2LDRH_POST [[COPY]], -32, 14 /* CC::al */, $noreg :: (load (s32))
+ ; CHECK-NEXT: [[t2LDRHi12_:%[0-9]+]]:rgpr = t2LDRHi12 [[t2LDRH_POST1]], 36, 14 /* CC::al */, $noreg :: (load (s32))
+ ; CHECK-NEXT: [[t2LDRHi8_:%[0-9]+]]:rgpr = t2LDRHi8 [[t2LDRH_POST1]], 24, 14 /* CC::al */, $noreg :: (load (s32))
+ ; CHECK-NEXT: [[t2LDRSHi12_:%[0-9]+]]:rgpr = t2LDRSHi12 [[t2LDRH_POST1]], 44, 14 /* CC::al */, $noreg :: (load (s32))
+ ; CHECK-NEXT: $r0 = COPY [[t2LDRH_POST1]]
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ %0:gprnopc = COPY $r0
+ %1:rgpr = t2LDRHi12 %0, 0, 14, $noreg :: (load (s32), align 4)
+ %2:rgpr = nuw t2SUBri %0, 32, 14, $noreg, $noreg
+ %3:rgpr = t2LDRHi12 %0, 4, 14, $noreg :: (load (s32), align 4)
+ %4:rgpr = t2LDRHi8 %0, -8, 14, $noreg :: (load (s32), align 4)
+ %5:rgpr = t2LDRSHi12 %0, 12, 14, $noreg :: (load (s32), align 4)
+ $r0 = COPY %2
+ tBX_RET 14, $noreg, implicit $r0
+
+...
+---
+name: t2LDRBi12_negoff
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: gprnopc, preferred-register: '' }
+ - { id: 1, class: rgpr, preferred-register: '' }
+ - { id: 2, class: rgpr, preferred-register: '' }
+ - { id: 3, class: rgpr, preferred-register: '' }
+ - { id: 4, class: rgpr, preferred-register: '' }
+ - { id: 5, class: rgpr, preferred-register: '' }
+liveins:
+ - { reg: '$r0', virtual-reg: '%0' }
+body: |
+ bb.0:
+ liveins: $r0
+
+ ; CHECK-LABEL: name: t2LDRBi12_negoff
+ ; CHECK: liveins: $r0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gprnopc = COPY $r0
+ ; CHECK-NEXT: [[t2LDRB_POST:%[0-9]+]]:rgpr, [[t2LDRB_POST1:%[0-9]+]]:rgpr = t2LDRB_POST [[COPY]], -32, 14 /* CC::al */, $noreg :: (load (s32))
+ ; CHECK-NEXT: [[t2LDRBi12_:%[0-9]+]]:rgpr = t2LDRBi12 [[t2LDRB_POST1]], 36, 14 /* CC::al */, $noreg :: (load (s32))
+ ; CHECK-NEXT: [[t2LDRBi8_:%[0-9]+]]:rgpr = t2LDRBi8 [[t2LDRB_POST1]], 24, 14 /* CC::al */, $noreg :: (load (s32))
+ ; CHECK-NEXT: [[t2LDRSBi12_:%[0-9]+]]:rgpr = t2LDRSBi12 [[t2LDRB_POST1]], 44, 14 /* CC::al */, $noreg :: (load (s32))
+ ; CHECK-NEXT: $r0 = COPY [[t2LDRB_POST1]]
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ %0:gprnopc = COPY $r0
+ %1:rgpr = t2LDRBi12 %0, 0, 14, $noreg :: (load (s32), align 4)
+ %2:rgpr = nuw t2SUBri %0, 32, 14, $noreg, $noreg
+ %3:rgpr = t2LDRBi12 %0, 4, 14, $noreg :: (load (s32), align 4)
+ %4:rgpr = t2LDRBi8 %0, -8, 14, $noreg :: (load (s32), align 4)
+ %12:rgpr = t2LDRSBi12 %0, 12, 14, $noreg :: (load (s32), align 4)
+ $r0 = COPY %2
+ tBX_RET 14, $noreg, implicit $r0
+
+...
+---
+name: t2STRi12_negoff
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: gprnopc, preferred-register: '' }
+ - { id: 1, class: rgpr, preferred-register: '' }
+ - { id: 2, class: rgpr, preferred-register: '' }
+liveins:
+ - { reg: '$r0', virtual-reg: '%0' }
+ - { reg: '$r1', virtual-reg: '%1' }
+body: |
+ bb.0:
+ liveins: $r0, $r1
+
+ ; CHECK-LABEL: name: t2STRi12_negoff
+ ; CHECK: liveins: $r0, $r1
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gprnopc = COPY $r0
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:rgpr = COPY $r1
+ ; CHECK-NEXT: [[t2SUBri:%[0-9]+]]:rgpr = nuw t2SUBri [[COPY]], 32, 14 /* CC::al */, $noreg, $noreg
+ ; CHECK-NEXT: t2STRi12 [[COPY1]], [[COPY]], 0, 14 /* CC::al */, $noreg :: (store (s32))
+ ; CHECK-NEXT: t2STRi12 [[COPY1]], [[COPY]], 4, 14 /* CC::al */, $noreg :: (store (s32))
+ ; CHECK-NEXT: t2STRi8 [[COPY1]], [[COPY]], -8, 14 /* CC::al */, $noreg :: (store (s32))
+ ; CHECK-NEXT: $r0 = COPY [[t2SUBri]]
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ %0:gprnopc = COPY $r0
+ %1:rgpr = COPY $r1
+ t2STRi12 %1:rgpr, %0, 0, 14, $noreg :: (store (s32), align 4)
+ %2:rgpr = nuw t2SUBri %0, 32, 14, $noreg, $noreg
+ t2STRi12 %1:rgpr, %0, 4, 14, $noreg :: (store (s32), align 4)
+ t2STRi8 %1:rgpr, %0, -8, 14, $noreg :: (store (s32), align 4)
+ $r0 = COPY %2
+ tBX_RET 14, $noreg, implicit $r0
+
+...
+---
+name: t2STRHi12_negoff
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: gprnopc, preferred-register: '' }
+ - { id: 1, class: rgpr, preferred-register: '' }
+ - { id: 2, class: rgpr, preferred-register: '' }
+liveins:
+ - { reg: '$r0', virtual-reg: '%0' }
+ - { reg: '$r1', virtual-reg: '%1' }
+body: |
+ bb.0:
+ liveins: $r0, $r1
+
+ ; CHECK-LABEL: name: t2STRHi12_negoff
+ ; CHECK: liveins: $r0, $r1
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gprnopc = COPY $r0
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:rgpr = COPY $r1
+ ; CHECK-NEXT: early-clobber %2:rgpr = t2STRH_POST [[COPY1]], [[COPY]], -32, 14 /* CC::al */, $noreg :: (store (s32))
+ ; CHECK-NEXT: t2STRHi12 [[COPY1]], %2, 36, 14 /* CC::al */, $noreg :: (store (s32))
+ ; CHECK-NEXT: t2STRHi8 [[COPY1]], %2, 24, 14 /* CC::al */, $noreg :: (store (s32))
+ ; CHECK-NEXT: $r0 = COPY %2
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ %0:gprnopc = COPY $r0
+ %1:rgpr = COPY $r1
+ t2STRHi12 %1:rgpr, %0, 0, 14, $noreg :: (store (s32), align 4)
+ %2:rgpr = nuw t2SUBri %0, 32, 14, $noreg, $noreg
+ t2STRHi12 %1:rgpr, %0, 4, 14, $noreg :: (store (s32), align 4)
+ t2STRHi8 %1:rgpr, %0, -8, 14, $noreg :: (store (s32), align 4)
+ $r0 = COPY %2
+ tBX_RET 14, $noreg, implicit $r0
+
+...
+---
+name: t2STRBi12_negoff
+tracksRegLiveness: true
+registers:
+ - { id: 0, class: gprnopc, preferred-register: '' }
+ - { id: 1, class: rgpr, preferred-register: '' }
+ - { id: 2, class: rgpr, preferred-register: '' }
+liveins:
+ - { reg: '$r0', virtual-reg: '%0' }
+ - { reg: '$r1', virtual-reg: '%1' }
+body: |
+ bb.0:
+ liveins: $r0, $r1
+
+ ; CHECK-LABEL: name: t2STRBi12_negoff
+ ; CHECK: liveins: $r0, $r1
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: [[COPY:%[0-9]+]]:gprnopc = COPY $r0
+ ; CHECK-NEXT: [[COPY1:%[0-9]+]]:rgpr = COPY $r1
+ ; CHECK-NEXT: early-clobber %2:rgpr = t2STRB_POST [[COPY1]], [[COPY]], -32, 14 /* CC::al */, $noreg :: (store (s32))
+ ; CHECK-NEXT: t2STRBi12 [[COPY1]], %2, 36, 14 /* CC::al */, $noreg :: (store (s32))
+ ; CHECK-NEXT: t2STRBi8 [[COPY1]], %2, 24, 14 /* CC::al */, $noreg :: (store (s32))
+ ; CHECK-NEXT: $r0 = COPY %2
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ %0:gprnopc = COPY $r0
+ %1:rgpr = COPY $r1
+ t2STRBi12 %1:rgpr, %0, 0, 14, $noreg :: (store (s32), align 4)
+ %2:rgpr = nuw t2SUBri %0, 32, 14, $noreg, $noreg
+ t2STRBi12 %1:rgpr, %0, 4, 14, $noreg :: (store (s32), align 4)
+ t2STRBi8 %1:rgpr, %0, -8, 14, $noreg :: (store (s32), align 4)
+ $r0 = COPY %2
+ tBX_RET 14, $noreg, implicit $r0
+
+...
diff --git a/llvm/test/CodeGen/Thumb2/store-prepostinc.mir b/llvm/test/CodeGen/Thumb2/store-prepostinc.mir
index 35b2fd9526332..0adf8f7c922b8 100644
--- a/llvm/test/CodeGen/Thumb2/store-prepostinc.mir
+++ b/llvm/test/CodeGen/Thumb2/store-prepostinc.mir
@@ -55,8 +55,9 @@ body: |
; CHECK-LABEL: name: STR_pre4
; CHECK: liveins: $r0, $r1
- ; CHECK: early-clobber $r0 = t2STR_PRE killed $r1, $r0, 4, 14 /* CC::al */, $noreg :: (store (s32))
- ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: early-clobber $r0 = t2STR_PRE killed $r1, $r0, 4, 14 /* CC::al */, $noreg :: (store (s32))
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
renamable $r0 = nuw t2ADDri killed renamable $r0, 4, 14 /* CC::al */, $noreg, $noreg
t2STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
@@ -75,9 +76,10 @@ body: |
; CHECK-LABEL: name: STR_pre8
; CHECK: liveins: $r0, $r1
- ; CHECK: renamable $r0 = nuw t2ADDri killed renamable $r0, 8, 14 /* CC::al */, $noreg, $noreg
- ; CHECK: t2STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
- ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: renamable $r0 = nuw t2ADDri killed renamable $r0, 8, 14 /* CC::al */, $noreg, $noreg
+ ; CHECK-NEXT: t2STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
renamable $r0 = nuw t2ADDri killed renamable $r0, 8, 14 /* CC::al */, $noreg, $noreg
t2STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
@@ -96,9 +98,10 @@ body: |
; CHECK-LABEL: name: STR_pre255
; CHECK: liveins: $r0, $r1
- ; CHECK: renamable $r0 = nuw t2ADDri killed renamable $r0, 255, 14 /* CC::al */, $noreg, $noreg
- ; CHECK: t2STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
- ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: renamable $r0 = nuw t2ADDri killed renamable $r0, 255, 14 /* CC::al */, $noreg, $noreg
+ ; CHECK-NEXT: t2STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
renamable $r0 = nuw t2ADDri killed renamable $r0, 255, 14 /* CC::al */, $noreg, $noreg
t2STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
@@ -117,9 +120,10 @@ body: |
; CHECK-LABEL: name: STR_pre256
; CHECK: liveins: $r0, $r1
- ; CHECK: renamable $r0 = nuw t2ADDri killed renamable $r0, 256, 14 /* CC::al */, $noreg, $noreg
- ; CHECK: t2STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
- ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: renamable $r0 = nuw t2ADDri killed renamable $r0, 256, 14 /* CC::al */, $noreg, $noreg
+ ; CHECK-NEXT: t2STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
renamable $r0 = nuw t2ADDri killed renamable $r0, 256, 14 /* CC::al */, $noreg, $noreg
t2STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
@@ -139,9 +143,10 @@ body: |
; CHECK-LABEL: name: STRD_pre4
; CHECK: liveins: $r0, $r1, $r2
- ; CHECK: renamable $r0 = nuw t2ADDri killed renamable $r0, 4, 14 /* CC::al */, $noreg, $noreg
- ; CHECK: t2STRDi8 killed $r1, killed $r2, $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
- ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: renamable $r0 = nuw t2ADDri killed renamable $r0, 4, 14 /* CC::al */, $noreg, $noreg
+ ; CHECK-NEXT: t2STRDi8 killed $r1, killed $r2, $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
renamable $r0 = nuw t2ADDri killed renamable $r0, 4, 14 /* CC::al */, $noreg, $noreg
t2STRDi8 killed renamable $r1, killed renamable $r2, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
@@ -161,8 +166,9 @@ body: |
; CHECK-LABEL: name: STRD_pre8
; CHECK: liveins: $r0, $r1, $r2
- ; CHECK: $r0 = t2STRD_PRE killed renamable $r1, killed renamable $r2, killed $r0, 8, 14 /* CC::al */, $noreg :: (store (s64))
- ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: $r0 = t2STRD_PRE killed renamable $r1, killed renamable $r2, killed $r0, 8, 14 /* CC::al */, $noreg :: (store (s64))
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
renamable $r0 = nuw t2ADDri killed renamable $r0, 8, 14 /* CC::al */, $noreg, $noreg
t2STRDi8 killed renamable $r1, killed renamable $r2, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
@@ -182,9 +188,10 @@ body: |
; CHECK-LABEL: name: STRD_pre255
; CHECK: liveins: $r0, $r1, $r2
- ; CHECK: renamable $r0 = nuw t2ADDri killed renamable $r0, 255, 14 /* CC::al */, $noreg, $noreg
- ; CHECK: t2STRDi8 killed $r1, killed $r2, $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
- ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: renamable $r0 = nuw t2ADDri killed renamable $r0, 255, 14 /* CC::al */, $noreg, $noreg
+ ; CHECK-NEXT: t2STRDi8 killed $r1, killed $r2, $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
renamable $r0 = nuw t2ADDri killed renamable $r0, 255, 14 /* CC::al */, $noreg, $noreg
t2STRDi8 killed renamable $r1, killed renamable $r2, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
@@ -204,9 +211,10 @@ body: |
; CHECK-LABEL: name: STRD_pre256
; CHECK: liveins: $r0, $r1, $r2
- ; CHECK: renamable $r0 = nuw t2ADDri killed renamable $r0, 256, 14 /* CC::al */, $noreg, $noreg
- ; CHECK: t2STRDi8 killed $r1, killed $r2, $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
- ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: renamable $r0 = nuw t2ADDri killed renamable $r0, 256, 14 /* CC::al */, $noreg, $noreg
+ ; CHECK-NEXT: t2STRDi8 killed $r1, killed $r2, $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
renamable $r0 = nuw t2ADDri killed renamable $r0, 256, 14 /* CC::al */, $noreg, $noreg
t2STRDi8 killed renamable $r1, killed renamable $r2, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
@@ -226,9 +234,10 @@ body: |
; CHECK-LABEL: name: STRD_pre1020
; CHECK: liveins: $r0, $r1, $r2
- ; CHECK: renamable $r0 = nuw t2ADDri killed renamable $r0, 1020, 14 /* CC::al */, $noreg, $noreg
- ; CHECK: t2STRDi8 killed $r1, killed $r2, $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
- ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: renamable $r0 = nuw t2ADDri killed renamable $r0, 1020, 14 /* CC::al */, $noreg, $noreg
+ ; CHECK-NEXT: t2STRDi8 killed $r1, killed $r2, $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
renamable $r0 = nuw t2ADDri killed renamable $r0, 1020, 14 /* CC::al */, $noreg, $noreg
t2STRDi8 killed renamable $r1, killed renamable $r2, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
@@ -248,9 +257,10 @@ body: |
; CHECK-LABEL: name: STRD_pre1024
; CHECK: liveins: $r0, $r1, $r2
- ; CHECK: renamable $r0 = nuw t2ADDri killed renamable $r0, 1024, 14 /* CC::al */, $noreg, $noreg
- ; CHECK: t2STRDi8 killed $r1, killed $r2, $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
- ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: renamable $r0 = nuw t2ADDri killed renamable $r0, 1024, 14 /* CC::al */, $noreg, $noreg
+ ; CHECK-NEXT: t2STRDi8 killed $r1, killed $r2, $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
renamable $r0 = nuw t2ADDri killed renamable $r0, 1024, 14 /* CC::al */, $noreg, $noreg
t2STRDi8 killed renamable $r1, killed renamable $r2, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
@@ -270,9 +280,10 @@ body: |
; CHECK-LABEL: name: STRD_prem4
; CHECK: liveins: $r0, $r1, $r2
- ; CHECK: renamable $r0 = nuw t2SUBri killed renamable $r0, 4, 14 /* CC::al */, $noreg, $noreg
- ; CHECK: t2STRDi8 killed $r1, killed $r2, $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
- ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: renamable $r0 = nuw t2SUBri killed renamable $r0, 4, 14 /* CC::al */, $noreg, $noreg
+ ; CHECK-NEXT: t2STRDi8 killed $r1, killed $r2, $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
renamable $r0 = nuw t2SUBri killed renamable $r0, 4, 14 /* CC::al */, $noreg, $noreg
t2STRDi8 killed renamable $r1, killed renamable $r2, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
@@ -292,8 +303,9 @@ body: |
; CHECK-LABEL: name: STRD_prem8
; CHECK: liveins: $r0, $r1, $r2
- ; CHECK: $r0 = t2STRD_PRE killed renamable $r1, killed renamable $r2, killed $r0, -8, 14 /* CC::al */, $noreg :: (store (s64))
- ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: $r0 = t2STRD_PRE killed renamable $r1, killed renamable $r2, killed $r0, -8, 14 /* CC::al */, $noreg :: (store (s64))
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
renamable $r0 = nuw t2SUBri killed renamable $r0, 8, 14 /* CC::al */, $noreg, $noreg
t2STRDi8 killed renamable $r1, killed renamable $r2, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
@@ -313,9 +325,10 @@ body: |
; CHECK-LABEL: name: STRD_prem255
; CHECK: liveins: $r0, $r1, $r2
- ; CHECK: renamable $r0 = nuw t2SUBri killed renamable $r0, 255, 14 /* CC::al */, $noreg, $noreg
- ; CHECK: t2STRDi8 killed $r1, killed $r2, $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
- ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: renamable $r0 = nuw t2SUBri killed renamable $r0, 255, 14 /* CC::al */, $noreg, $noreg
+ ; CHECK-NEXT: t2STRDi8 killed $r1, killed $r2, $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
renamable $r0 = nuw t2SUBri killed renamable $r0, 255, 14 /* CC::al */, $noreg, $noreg
t2STRDi8 killed renamable $r1, killed renamable $r2, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
@@ -335,9 +348,10 @@ body: |
; CHECK-LABEL: name: STRD_prem256
; CHECK: liveins: $r0, $r1, $r2
- ; CHECK: renamable $r0 = nuw t2SUBri killed renamable $r0, 256, 14 /* CC::al */, $noreg, $noreg
- ; CHECK: t2STRDi8 killed $r1, killed $r2, $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
- ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: renamable $r0 = nuw t2SUBri killed renamable $r0, 256, 14 /* CC::al */, $noreg, $noreg
+ ; CHECK-NEXT: t2STRDi8 killed $r1, killed $r2, $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
renamable $r0 = nuw t2SUBri killed renamable $r0, 256, 14 /* CC::al */, $noreg, $noreg
t2STRDi8 killed renamable $r1, killed renamable $r2, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
@@ -357,9 +371,10 @@ body: |
; CHECK-LABEL: name: STRD_prem1020
; CHECK: liveins: $r0, $r1, $r2
- ; CHECK: renamable $r0 = nuw t2SUBri killed renamable $r0, 1020, 14 /* CC::al */, $noreg, $noreg
- ; CHECK: t2STRDi8 killed $r1, killed $r2, $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
- ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: renamable $r0 = nuw t2SUBri killed renamable $r0, 1020, 14 /* CC::al */, $noreg, $noreg
+ ; CHECK-NEXT: t2STRDi8 killed $r1, killed $r2, $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
renamable $r0 = nuw t2SUBri killed renamable $r0, 1020, 14 /* CC::al */, $noreg, $noreg
t2STRDi8 killed renamable $r1, killed renamable $r2, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
@@ -379,9 +394,10 @@ body: |
; CHECK-LABEL: name: STRD_prem1024
; CHECK: liveins: $r0, $r1, $r2
- ; CHECK: renamable $r0 = nuw t2SUBri killed renamable $r0, 1024, 14 /* CC::al */, $noreg, $noreg
- ; CHECK: t2STRDi8 killed $r1, killed $r2, $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
- ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: renamable $r0 = nuw t2SUBri killed renamable $r0, 1024, 14 /* CC::al */, $noreg, $noreg
+ ; CHECK-NEXT: t2STRDi8 killed $r1, killed $r2, $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
renamable $r0 = nuw t2SUBri killed renamable $r0, 1024, 14 /* CC::al */, $noreg, $noreg
t2STRDi8 killed renamable $r1, killed renamable $r2, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
@@ -401,8 +417,9 @@ body: |
; CHECK-LABEL: name: STR_post4
; CHECK: liveins: $r0, $r1
- ; CHECK: early-clobber $r0 = t2STR_POST killed $r1, $r0, 4, 14 /* CC::al */, $noreg :: (store (s32))
- ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: early-clobber $r0 = t2STR_POST killed $r1, $r0, 4, 14 /* CC::al */, $noreg :: (store (s32))
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
t2STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
renamable $r0 = nuw t2ADDri killed renamable $r0, 4, 14 /* CC::al */, $noreg, $noreg
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
@@ -421,8 +438,9 @@ body: |
; CHECK-LABEL: name: STR_post8
; CHECK: liveins: $r0, $r1
- ; CHECK: early-clobber $r0 = t2STR_POST killed $r1, $r0, 8, 14 /* CC::al */, $noreg :: (store (s32))
- ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: early-clobber $r0 = t2STR_POST killed $r1, $r0, 8, 14 /* CC::al */, $noreg :: (store (s32))
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
t2STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
renamable $r0 = nuw t2ADDri killed renamable $r0, 8, 14 /* CC::al */, $noreg, $noreg
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
@@ -441,9 +459,10 @@ body: |
; CHECK-LABEL: name: STR_post255
; CHECK: liveins: $r0, $r1
- ; CHECK: t2STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
- ; CHECK: renamable $r0 = nuw t2ADDri killed renamable $r0, 255, 14 /* CC::al */, $noreg, $noreg
- ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: t2STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
+ ; CHECK-NEXT: renamable $r0 = nuw t2ADDri killed renamable $r0, 255, 14 /* CC::al */, $noreg, $noreg
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
t2STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
renamable $r0 = nuw t2ADDri killed renamable $r0, 255, 14 /* CC::al */, $noreg, $noreg
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
@@ -462,9 +481,10 @@ body: |
; CHECK-LABEL: name: STR_post256
; CHECK: liveins: $r0, $r1
- ; CHECK: t2STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
- ; CHECK: renamable $r0 = nuw t2ADDri killed renamable $r0, 256, 14 /* CC::al */, $noreg, $noreg
- ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: t2STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
+ ; CHECK-NEXT: renamable $r0 = nuw t2ADDri killed renamable $r0, 256, 14 /* CC::al */, $noreg, $noreg
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
t2STRi12 killed renamable $r1, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s32))
renamable $r0 = nuw t2ADDri killed renamable $r0, 256, 14 /* CC::al */, $noreg, $noreg
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
@@ -484,8 +504,9 @@ body: |
; CHECK-LABEL: name: STRD_post4
; CHECK: liveins: $r0, $r1, $r2
- ; CHECK: $r0 = t2STRD_POST killed renamable $r1, killed renamable $r2, killed $r0, 4, 14 /* CC::al */, $noreg :: (store (s64))
- ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: $r0 = t2STRD_POST killed renamable $r1, killed renamable $r2, killed $r0, 4, 14 /* CC::al */, $noreg :: (store (s64))
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
t2STRDi8 killed renamable $r1, killed renamable $r2, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
renamable $r0 = nuw t2ADDri killed renamable $r0, 4, 14 /* CC::al */, $noreg, $noreg
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
@@ -505,8 +526,9 @@ body: |
; CHECK-LABEL: name: STRD_post8
; CHECK: liveins: $r0, $r1, $r2
- ; CHECK: $r0 = t2STRD_POST killed renamable $r1, killed renamable $r2, killed $r0, 8, 14 /* CC::al */, $noreg :: (store (s64))
- ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: $r0 = t2STRD_POST killed renamable $r1, killed renamable $r2, killed $r0, 8, 14 /* CC::al */, $noreg :: (store (s64))
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
t2STRDi8 killed renamable $r1, killed renamable $r2, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
renamable $r0 = nuw t2ADDri killed renamable $r0, 8, 14 /* CC::al */, $noreg, $noreg
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
@@ -526,9 +548,10 @@ body: |
; CHECK-LABEL: name: STRD_post255
; CHECK: liveins: $r0, $r1, $r2
- ; CHECK: t2STRDi8 killed $r1, killed $r2, $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
- ; CHECK: renamable $r0 = nuw t2ADDri killed renamable $r0, 255, 14 /* CC::al */, $noreg, $noreg
- ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: t2STRDi8 killed $r1, killed $r2, $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
+ ; CHECK-NEXT: renamable $r0 = nuw t2ADDri killed renamable $r0, 255, 14 /* CC::al */, $noreg, $noreg
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
t2STRDi8 killed renamable $r1, killed renamable $r2, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
renamable $r0 = nuw t2ADDri killed renamable $r0, 255, 14 /* CC::al */, $noreg, $noreg
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
@@ -548,8 +571,9 @@ body: |
; CHECK-LABEL: name: STRD_post256
; CHECK: liveins: $r0, $r1, $r2
- ; CHECK: $r0 = t2STRD_POST killed renamable $r1, killed renamable $r2, killed $r0, 256, 14 /* CC::al */, $noreg :: (store (s64))
- ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: $r0 = t2STRD_POST killed renamable $r1, killed renamable $r2, killed $r0, 256, 14 /* CC::al */, $noreg :: (store (s64))
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
t2STRDi8 killed renamable $r1, killed renamable $r2, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
renamable $r0 = nuw t2ADDri killed renamable $r0, 256, 14 /* CC::al */, $noreg, $noreg
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
@@ -569,8 +593,9 @@ body: |
; CHECK-LABEL: name: STRD_post1020
; CHECK: liveins: $r0, $r1, $r2
- ; CHECK: $r0 = t2STRD_POST killed renamable $r1, killed renamable $r2, killed $r0, 1020, 14 /* CC::al */, $noreg :: (store (s64))
- ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: $r0 = t2STRD_POST killed renamable $r1, killed renamable $r2, killed $r0, 1020, 14 /* CC::al */, $noreg :: (store (s64))
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
t2STRDi8 killed renamable $r1, killed renamable $r2, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
renamable $r0 = nuw t2ADDri killed renamable $r0, 1020, 14 /* CC::al */, $noreg, $noreg
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
@@ -590,9 +615,10 @@ body: |
; CHECK-LABEL: name: STRD_post1024
; CHECK: liveins: $r0, $r1, $r2
- ; CHECK: t2STRDi8 killed $r1, killed $r2, $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
- ; CHECK: renamable $r0 = nuw t2ADDri killed renamable $r0, 1024, 14 /* CC::al */, $noreg, $noreg
- ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: t2STRDi8 killed $r1, killed $r2, $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
+ ; CHECK-NEXT: renamable $r0 = nuw t2ADDri killed renamable $r0, 1024, 14 /* CC::al */, $noreg, $noreg
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
t2STRDi8 killed renamable $r1, killed renamable $r2, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
renamable $r0 = nuw t2ADDri killed renamable $r0, 1024, 14 /* CC::al */, $noreg, $noreg
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
@@ -612,8 +638,9 @@ body: |
; CHECK-LABEL: name: STRD_postm4
; CHECK: liveins: $r0, $r1, $r2
- ; CHECK: $r0 = t2STRD_POST killed renamable $r1, killed renamable $r2, killed $r0, -4, 14 /* CC::al */, $noreg :: (store (s64))
- ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: $r0 = t2STRD_POST killed renamable $r1, killed renamable $r2, killed $r0, -4, 14 /* CC::al */, $noreg :: (store (s64))
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
t2STRDi8 killed renamable $r1, killed renamable $r2, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
renamable $r0 = nuw t2SUBri killed renamable $r0, 4, 14 /* CC::al */, $noreg, $noreg
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
@@ -633,8 +660,9 @@ body: |
; CHECK-LABEL: name: STRD_postm8
; CHECK: liveins: $r0, $r1, $r2
- ; CHECK: $r0 = t2STRD_POST killed renamable $r1, killed renamable $r2, killed $r0, -8, 14 /* CC::al */, $noreg :: (store (s64))
- ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: $r0 = t2STRD_POST killed renamable $r1, killed renamable $r2, killed $r0, -8, 14 /* CC::al */, $noreg :: (store (s64))
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
t2STRDi8 killed renamable $r1, killed renamable $r2, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
renamable $r0 = nuw t2SUBri killed renamable $r0, 8, 14 /* CC::al */, $noreg, $noreg
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
@@ -654,9 +682,10 @@ body: |
; CHECK-LABEL: name: STRD_postm255
; CHECK: liveins: $r0, $r1, $r2
- ; CHECK: t2STRDi8 killed $r1, killed $r2, $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
- ; CHECK: renamable $r0 = nuw t2SUBri killed renamable $r0, 255, 14 /* CC::al */, $noreg, $noreg
- ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: t2STRDi8 killed $r1, killed $r2, $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
+ ; CHECK-NEXT: renamable $r0 = nuw t2SUBri killed renamable $r0, 255, 14 /* CC::al */, $noreg, $noreg
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
t2STRDi8 killed renamable $r1, killed renamable $r2, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
renamable $r0 = nuw t2SUBri killed renamable $r0, 255, 14 /* CC::al */, $noreg, $noreg
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
@@ -676,8 +705,9 @@ body: |
; CHECK-LABEL: name: STRD_postm256
; CHECK: liveins: $r0, $r1, $r2
- ; CHECK: $r0 = t2STRD_POST killed renamable $r1, killed renamable $r2, killed $r0, 256, 14 /* CC::al */, $noreg :: (store (s64))
- ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: $r0 = t2STRD_POST killed renamable $r1, killed renamable $r2, killed $r0, 256, 14 /* CC::al */, $noreg :: (store (s64))
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
t2STRDi8 killed renamable $r1, killed renamable $r2, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
renamable $r0 = nuw t2ADDri killed renamable $r0, 256, 14 /* CC::al */, $noreg, $noreg
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
@@ -697,8 +727,9 @@ body: |
; CHECK-LABEL: name: STRD_postm1020
; CHECK: liveins: $r0, $r1, $r2
- ; CHECK: $r0 = t2STRD_POST killed renamable $r1, killed renamable $r2, killed $r0, -1020, 14 /* CC::al */, $noreg :: (store (s64))
- ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: $r0 = t2STRD_POST killed renamable $r1, killed renamable $r2, killed $r0, -1020, 14 /* CC::al */, $noreg :: (store (s64))
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
t2STRDi8 killed renamable $r1, killed renamable $r2, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
renamable $r0 = nuw t2SUBri killed renamable $r0, 1020, 14 /* CC::al */, $noreg, $noreg
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
@@ -718,9 +749,10 @@ body: |
; CHECK-LABEL: name: STRD_postm1024
; CHECK: liveins: $r0, $r1, $r2
- ; CHECK: t2STRDi8 killed $r1, killed $r2, $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
- ; CHECK: renamable $r0 = nuw t2SUBri killed renamable $r0, 1024, 14 /* CC::al */, $noreg, $noreg
- ; CHECK: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: t2STRDi8 killed $r1, killed $r2, $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
+ ; CHECK-NEXT: renamable $r0 = nuw t2SUBri killed renamable $r0, 1024, 14 /* CC::al */, $noreg, $noreg
+ ; CHECK-NEXT: tBX_RET 14 /* CC::al */, $noreg, implicit $r0
t2STRDi8 killed renamable $r1, killed renamable $r2, renamable $r0, 0, 14 /* CC::al */, $noreg :: (store (s64))
renamable $r0 = nuw t2SUBri killed renamable $r0, 1024, 14 /* CC::al */, $noreg, $noreg
tBX_RET 14 /* CC::al */, $noreg, implicit $r0
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