[PATCH] D90051: AMDGPU/GlobalISel: Add floating point med3 combine

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp:192
+  Register Val;
+  Optional<FPValueAndVReg> K0, K1;
+  // Match min(max(Val, K0), K1) or max(min(Val, K1), K0). Then see if K0 <= K1.
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I don't see why to make these optional if they won't be set or used if the matcher return false


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Comment at: llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp:209
+    // Don't fold single use constant that can't be inlined.
+    const SIInstrInfo *TII = MF.getSubtarget<GCNSubtarget>().getInstrInfo();
+    if ((!MRI.hasOneNonDBGUse(K0->VReg) || TII->isInlineConstant(K0->Value)) &&
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This should be cached in the helper?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D90051/new/

https://reviews.llvm.org/D90051