[PATCH] D114589: [DAG] Enable ISD::EXTRACT_ELEMENT SimplifyDemandedBits handling

[Nemanja Ivanovic via Phabricator via llvm-commits]

nemanjai requested changes to this revision.
nemanjai added inline comments.
This revision now requires changes to proceed.


================
Comment at: llvm/test/CodeGen/PowerPC/fp128-bitcast-after-operation.ll:92-106
+; PPC64-P8-LE-LABEL: test_copysign:
+; PPC64-P8-LE:       # %bb.0: # %entry
+; PPC64-P8-LE-NEXT:    li 3, 16399
+; PPC64-P8-LE-NEXT:    li 4, 3019
+; PPC64-P8-LE-NEXT:    rldic 3, 3, 48, 1
+; PPC64-P8-LE-NEXT:    rldic 4, 4, 52, 0
+; PPC64-P8-LE-NEXT:    blr
----------------
Something seems very wrong here. We seem to simply be materializing a pair of constants which isn't what the test case does.
Before this change, we had:
```
t4: f64,ch = CopyFromReg t0, Register:f64 %1
t2: f64,ch = CopyFromReg t0, Register:f64 %0
t5: ppcf128 = build_pair t4, t2
t18: i128 = bitcast t5
t21: i64 = extract_element t20, Constant:i64<0>
t23: i64 = and t21, Constant:i64<-9223372036854775808>
...
```
And with this change at the same stage, we have:
```
t4: f64,ch = CopyFromReg t0, Register:f64 %1
t5: ppcf128 = build_pair t4, undef:f64
t18: i128 = bitcast t5
t21: i64 = extract_element t18, Constant:i64<0>
t23: i64 = and t21, Constant:i64<-9223372036854775808>
```
Then type legalization turns `t23` into:
```
t23: i64 = and undef:i64, Constant:i64<-9223372036854775808>
```
thereby reducing the entire function to:
```
t14: ch,glue = CopyToReg t0, Register:i64 $x3, Constant:i64<4615908143078047744>
t16: ch,glue = CopyToReg t14, Register:i64 $x4, Constant:i64<-4850376798678024192>, t14:1
```


Repository:
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https://reviews.llvm.org/D114589