[PATCH] D114768: [ADT][Support] Remove zero-width assertions

[Schuyler Eldridge via Phabricator via llvm-commits]

seldridge updated this revision to Diff 390770.
seldridge added a comment.

Drop SExt commit.  This is somewhat controversial and, after further
examination on my end, seemingly not needed.  I can revive this if it
becomes necessary for CIRCT.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D114768/new/

https://reviews.llvm.org/D114768

Files:
  llvm/include/llvm/ADT/APInt.h


Index: llvm/include/llvm/ADT/APInt.h
===================================================================
--- llvm/include/llvm/ADT/APInt.h
+++ llvm/include/llvm/ADT/APInt.h
@@ -1458,10 +1458,8 @@
   /// uint64_t. The bitwidth must be <= 64 or the value must fit within a
   /// uint64_t. Otherwise an assertion will result.
   uint64_t getZExtValue() const {
-    if (isSingleWord()) {
-      assert(BitWidth && "zero width values not allowed");
+    if (isSingleWord())
       return U.VAL;
-    }
     assert(getActiveBits() <= 64 && "Too many bits for uint64_t");
     return U.pVal[0];
   }


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