[PATCH] D114628: [AArch64][SVE] Duplicate FP_EXTEND/FP_TRUNC -> LOAD/STORE dag combines

[Paul Walker via Phabricator via llvm-commits]

paulwalker-arm accepted this revision.
paulwalker-arm added a comment.
This revision is now accepted and ready to land.

I'm accepting this patch on the grounds it doesn't newly enable the use of fp extload/truncstore nodes, it is just extending their use for the cases not already handled by D114580 <https://reviews.llvm.org/D114580>.

With regards to using fp extload/truncstrore nodes: We experimented with several solutions and this ended up being the cleanest of the approaches.  The other solutions either required fragile target specific DAG combines or the introduction of new common ISD nodes (e.g. FPEXTEND_INREG) that require significant plumbing that seemed overkill for our single use case.  There is nothing in the code (documentation, asserts... etc) suggesting any kind of restriction and we added tests to verify they work as required.  If something does arise we'll just fix it like any other bug.  The SVE VLS support is somewhat specially anyway given almost all nodes are note considered legal and require custom lowering so in this regard there's no real difference between an extending int load and an extending fp load.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D114628/new/

https://reviews.llvm.org/D114628