[PATCH] D114795: [PR52475] Ensure a correct chain in copies to/from hidden sret parameter

[Fraser Cormack via Phabricator via llvm-commits]

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This patch fixes an issue during SelectionDAG construction. When the
target is unable to lower the function's return value, a hidden sret
parameter is created. It is initialized and copied to a stored variable

- DemoteRegister -- with CopyToReg and is later fetched with

CopyFromReg. The bug is that the chains used for each copy are
inconsistent, and thus in rare cases the scheduler may issue them out of
order.

The fix is to ensure that the CopyFromReg uses the DAG root which is set
as the chain corresponding to the initial CopyToReg.

Fixes https://bugs.llvm.org/show_bug.cgi?id=52475


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D114795

Files:
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-calling-conv-fastcc.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-calling-conv.ll
  llvm/test/CodeGen/RISCV/rvv/pr52475.ll
  llvm/test/CodeGen/RISCV/srem-vector-lkk.ll
  llvm/test/CodeGen/RISCV/urem-vector-lkk.ll
  llvm/test/CodeGen/WebAssembly/multi-return.ll
  llvm/test/CodeGen/WebAssembly/simd-conversions.ll
  llvm/test/CodeGen/X86/addcarry.ll
  llvm/test/CodeGen/X86/fp128-cast.ll
  llvm/test/CodeGen/X86/i128-add.ll
  llvm/test/CodeGen/X86/masked_load.ll
  llvm/test/CodeGen/X86/mul128.ll
  llvm/test/CodeGen/X86/pmulh.ll
  llvm/test/CodeGen/X86/scheduler-backtracking.ll
  llvm/test/CodeGen/X86/subcarry.ll
  llvm/test/CodeGen/X86/umul-with-overflow.ll
  llvm/test/CodeGen/X86/umulo-128-legalisation-lowering.ll

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