[PATCH] D114778: [XCOFF][FastISel] make fast isel can lower general intrinsics

[ChenZheng via Phabricator via llvm-commits]

shchenz created this revision.
shchenz added reviewers: qiucf, jsji, nemanjai, Jake-Egan, PowerPC.
Herald added a subscriber: hiraditya.
shchenz requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

This patch is to make fast isel for 64bit XCOFF have the ability to select general intrinsics which will not be generated as function entry and function descriptor in the final assembly.

This hides some issues in `SelectBasicBlock()`  -> `Scheduler->EmitSchedule()` for a single debug related intrinsic call, for example `DBG_LABEL` in https://reviews.llvm.org/D114685 and `DBG_VALUE` in https://reviews.llvm.org/D114686.

For example, for `DBG_VALUE` in patch https://reviews.llvm.org/D114686, the `DBG_VALUE` will be wrongly generated at the end of the function instead of the front like the IR shows, thus later DWARF info generation will miss generating some DWARF info(arguments/local variables) for the inlined subroutine.

We can fix this issue in `EmitSchedule` of course, but I think for our XCOFF case, the most sensible way is to let fast ISEL can lower these intrinsics calls so that we don't need to use DAG isel for these not well handled debug intrinsic calls in `SelectBasicBlock()`  -> `Scheduler->EmitSchedule()`.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D114778

Files:
  llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
  llvm/test/CodeGen/PowerPC/debug-label-fast-isel.ll


Index: llvm/test/CodeGen/PowerPC/debug-label-fast-isel.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/PowerPC/debug-label-fast-isel.ll
@@ -0,0 +1,56 @@
+
+; RUN: llc %s -mtriple powerpc64-ibm-aix-xcoff -o - | FileCheck %s --check-prefix=CHECKASM
+
+; This is a case copied from test/DebugInfo/Generic/debug-label-mi.ll. This test
+; is to explicited that fast isel for XCOFF works as expected for debug related
+; intrinsics.
+
+; CHECKASM: DEBUG_LABEL: foo:top
+; CHECKASM: DEBUG_LABEL: foo:done
+
+source_filename = "debug-label-mi.c"
+
+; Function Attrs: noinline nounwind optnone
+define i32 @foo(i32 signext %a, i32 signext %b) #0 !dbg !4 {
+entry:
+  %a.addr = alloca i32, align 4
+  %b.addr = alloca i32, align 4
+  %sum = alloca i32, align 4
+  store i32 %a, i32* %a.addr, align 4
+  store i32 %b, i32* %b.addr, align 4
+  br label %top
+
+top:                                              ; preds = %entry
+  call void @llvm.dbg.label(metadata !8), !dbg !9
+  %0 = load i32, i32* %a.addr, align 4
+  %1 = load i32, i32* %b.addr, align 4
+  %add = add nsw i32 %0, %1
+  store i32 %add, i32* %sum, align 4
+  br label %done
+
+done:                                             ; preds = %top
+  call void @llvm.dbg.label(metadata !10), !dbg !11
+  %2 = load i32, i32* %sum, align 4
+  ret i32 %2
+}
+
+; Function Attrs: nounwind readnone speculatable
+declare void @llvm.dbg.label(metadata)
+
+attributes #0 = { noinline nounwind optnone uwtable }
+
+!llvm.dbg.cu = !{!0}
+!llvm.module.flags = !{!3}
+
+!0 = distinct !DICompileUnit(language: DW_LANG_C99, file: !1, isOptimized: false, emissionKind: FullDebug, enums: !2)
+!1 = !DIFile(filename: "debug-label-mi.c", directory: "./")
+!2 = !{}
+!3 = !{i32 2, !"Debug Info Version", i32 3}
+!4 = distinct !DISubprogram(name: "foo", scope: !1, file: !1, line: 1, type: !5, isLocal: false, isDefinition: true, scopeLine: 2, isOptimized: false, unit: !0, retainedNodes: !2)
+!5 = !DISubroutineType(types: !6)
+!6 = !{!7, !7, !7}
+!7 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
+!8 = !DILabel(scope: !4, name: "top", file: !1, line: 4)
+!9 = !DILocation(line: 4, column: 1, scope: !4)
+!10 = !DILabel(scope: !4, name: "done", file: !1, line: 7)
+!11 = !DILocation(line: 7, column: 1, scope: !4)
Index: llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
===================================================================
--- llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
+++ llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
@@ -1775,12 +1775,13 @@
     return false;
 
   case Instruction::Call:
-    // On AIX, call lowering uses the DAG-ISEL path currently so that the
+    // On AIX, normal call lowering uses the DAG-ISEL path currently so that the
     // callee of the direct function call instruction will be mapped to the
     // symbol for the function's entry point, which is distinct from the
     // function descriptor symbol. The latter is the symbol whose XCOFF symbol
     // name is the C-linkage name of the source level function.
-    if (TM.getTargetTriple().isOSAIX())
+    // But fast isel still have the ability to do selection for intrinsics.
+    if (TM.getTargetTriple().isOSAIX() && !dyn_cast<IntrinsicInst>(I))
       return false;
     return selectCall(I);
 


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D114778.390604.patch
Type: text/x-patch
Size: 3301 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20211130/fb205498/attachment.bin>