[PATCH] D114628: [AArch64][SVE] Duplicate FP_EXTEND/FP_TRUNC -> LOAD/STORE dag combines

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

I'm not really happy that we're using extload/truncstore with floating-point types here.  It's an obscure, mostly unused feature, intended to support certain ancient floating-point instruction sets that would implicitly extend floating-point loads to the natural register size (think x87, m68k).  I'm concerned this is throwing us into mostly untested codepaths; in particular, I don't think any other target uses these operations with vector floating-point types or 16-bit floating-point types.

It's not clear to me why the special case is being implemented this way, anyway; if we want to combine this sort of load+shuffle or shuffle+store pattern into two loads/stores, we should just do that.  It doesn't need to be specific to fcvt.


Repository:
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https://reviews.llvm.org/D114628