[PATCH] D114506: [AArch64][SVE]Support for SVE instrinsic in AArch64TargetTransformInfo

duanbo via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Nov 29 08:04:10 PST 2021


duan.db added a comment.

@sdesmalen  Thank you for your review, and so sorry for the delay. I have modified the test case according to your valuable suggestions. This test case checks whether loop-reduce can be assigned the correct type(i.e.  Address Type)to the SVE load and store intrinsic. If so, SVE.load will reuse the original induction variable, and compilation is more reasonable.
Any other suggestions about the code?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D114506/new/

https://reviews.llvm.org/D114506



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