[PATCH] D114638: [ARM] Introduce i8neg and i8pos addressing modes

[Dave Green via Phabricator via llvm-commits]

dmgreen created this revision.
dmgreen added reviewers: simon_tatham, SjoerdMeijer, samtebbs, john.brawn, momchil.velikov.
Herald added subscribers: hiraditya, kristof.beyls.
dmgreen requested review of this revision.
Herald added a project: LLVM.

Some instructions with i8 immediate ranges can only hold negative values (like `t2LDRHi8`), only hold positive values (like `t2STRT`) or hold +/- depending on the U bit (like the pre/post inc instructions. e.g `t2LDRH_POST`). This patch splits the AddrModeT2_i8 into AddrModeT2_i8, AddrModeT2_i8pos and AddrModeT2_i8neg to make this clear.

This allows us to get the offset ranges of t2LDRHi8 correct in the load/store optimizer, fixing issues where we could end up creating instructions with positive offsets (which may then be encoded as `ldrht`).


https://reviews.llvm.org/D114638

Files:
  llvm/lib/Target/ARM/ARMBaseInstrInfo.h
  llvm/lib/Target/ARM/ARMFrameLowering.cpp
  llvm/lib/Target/ARM/ARMInstrFormats.td
  llvm/lib/Target/ARM/ARMInstrThumb2.td
  llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
  llvm/lib/Target/ARM/MCTargetDesc/ARMBaseInfo.h
  llvm/lib/Target/ARM/Thumb2InstrInfo.cpp
  llvm/test/CodeGen/Thumb2/postinc-distribute.mir

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