[PATCH] D114361: [MachineCSE] Add an option to enable global CSE
wangpc via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Nov 26 01:59:55 PST 2021
pcwang-thead updated this revision to Diff 389948.
pcwang-thead added a comment.
- Address comments.
- Only apply aggressive CSE to `Heuristics 1`.
- Make `enableAggressiveMachineCSE` return false by default.
- Remove RISCV MIR test.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D114361/new/
https://reviews.llvm.org/D114361
Files:
llvm/include/llvm/CodeGen/TargetInstrInfo.h
llvm/lib/CodeGen/MachineCSE.cpp
Index: llvm/lib/CodeGen/MachineCSE.cpp
===================================================================
--- llvm/lib/CodeGen/MachineCSE.cpp
+++ llvm/lib/CodeGen/MachineCSE.cpp
@@ -51,6 +51,10 @@
#define DEBUG_TYPE "machine-cse"
+static cl::opt<bool> EnableAggressiveMachineCSE(
+ "enable-aggressive-machine-cse", cl::Hidden, cl::init(false),
+ cl::desc("Enable aggressive machine CSE on the whole function."));
+
STATISTIC(NumCoalesces, "Number of copies coalesced");
STATISTIC(NumCSEs, "Number of common subexpression eliminated");
STATISTIC(NumPREs, "Number of partial redundant expression"
@@ -454,7 +458,8 @@
// Heuristics #1: Don't CSE "cheap" computation if the def is not local or in
// an immediate predecessor. We don't want to increase register pressure and
// end up causing other computation to be spilled.
- if (TII->isAsCheapAsAMove(*MI)) {
+ if (TII->isAsCheapAsAMove(*MI) && !EnableAggressiveMachineCSE &&
+ !TII->enableAggressiveMachineCSE(*MI->getMF())) {
MachineBasicBlock *BB = MI->getParent();
if (CSBB != BB && !CSBB->isSuccessor(BB))
return false;
Index: llvm/include/llvm/CodeGen/TargetInstrInfo.h
===================================================================
--- llvm/include/llvm/CodeGen/TargetInstrInfo.h
+++ llvm/include/llvm/CodeGen/TargetInstrInfo.h
@@ -375,6 +375,13 @@
return MI.isAsCheapAsAMove();
}
+ /// Return true if we want to do aggressive MachineCSE.
+ ///
+ /// Aggressive MachineCSE can be enabled when optimizing for size.
+ virtual bool enableAggressiveMachineCSE(const MachineFunction &MF) const {
+ return false;
+ }
+
/// Return true if the instruction should be sunk by MachineSink.
///
/// MachineSink determines on its own whether the instruction is safe to sink;
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