[PATCH] D113291: [AggressiveInstCombine] Lower Table Based CTTZ and enable it for AARCH64 in -O3

[Djordje Todorovic via Phabricator via llvm-commits]

djtodoro added a comment.

In D113291#3153219 <https://reviews.llvm.org/D113291#3153219>, @fhahn wrote:

>> TODO: Get the data on SPEC benchmark.
>
> Did you manage to collect any perf data yet to motivate this change?

Not yet, but I will share ASAP.

Thanks for your comments!



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Comment at: llvm/test/Transforms/AggressiveInstCombine/AArch64/dereferencing-pointer.ll:40
+entry:
+  %0 = load i64, i64* %b, align 8
+  %sub = sub i64 0, %0
----------------
fhahn wrote:
> can the tests instead just take `i64 %b` or does it need to be a pointer? (
This test is meant to test the pointer type. There are other tests checking non-ptr type.


================
Comment at: llvm/test/Transforms/AggressiveInstCombine/AArch64/dereferencing-pointer.ll:50
+
+!llvm.module.flags = !{!0, !1, !2, !3, !4, !5, !6}
+!llvm.ident = !{!7}
----------------
fhahn wrote:
> is all the mote data needed? Same for the other tests
Yep, I'll reduce the tests in the next update.


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https://reviews.llvm.org/D113291