[PATCH] D114577: [AArch64][SVEIntrinsicOpts] Fix: predicated SVE mul/fmul are not commutative

[Paul Walker via Phabricator via llvm-commits]

paulwalker-arm accepted this revision.
paulwalker-arm added inline comments.
This revision is now accepted and ready to land.


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Comment at: llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp:837
   if (IsUnitSplat(OpMultiplier)) {
     // [f]mul pg (dupx 1) %n => %n
     OpMultiplicand->takeName(&II);
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Before committing can you please update this comment and the one within the `else if` block to reflect the now restricted use case of `[f]mul pg %n, (dupx 1) => %n`.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D114577/new/

https://reviews.llvm.org/D114577