[llvm] a25e08d - [PowerPC/ Regenerate fp128-bitcast-after-operation test checks
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Thu Nov 25 05:52:26 PST 2021
Author: Simon Pilgrim
Date: 2021-11-25T13:39:57Z
New Revision: a25e08dd3ca265c0150a7b49537fee26b269c446
URL: https://github.com/llvm/llvm-project/commit/a25e08dd3ca265c0150a7b49537fee26b269c446
DIFF: https://github.com/llvm/llvm-project/commit/a25e08dd3ca265c0150a7b49537fee26b269c446.diff
LOG: [PowerPC/ Regenerate fp128-bitcast-after-operation test checks
Added:
Modified:
llvm/test/CodeGen/PowerPC/fp128-bitcast-after-operation.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/PowerPC/fp128-bitcast-after-operation.ll b/llvm/test/CodeGen/PowerPC/fp128-bitcast-after-operation.ll
index fe510ec091706..3e888b616f2af 100644
--- a/llvm/test/CodeGen/PowerPC/fp128-bitcast-after-operation.ll
+++ b/llvm/test/CodeGen/PowerPC/fp128-bitcast-after-operation.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr8 < %s | FileCheck %s -check-prefix=PPC64-P8
; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -mcpu=pwr7 < %s | FileCheck %s -check-prefix=PPC64
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 < %s | FileCheck %s -check-prefix=PPC64-P8
@@ -5,113 +6,127 @@
; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-linux-gnu < %s | FileCheck %s -check-prefix=PPC32
define i128 @test_abs(ppc_fp128 %x) nounwind {
-entry:
-; PPC64-LABEL: test_abs:
-; PPC64-DAG: stfd 2, [[OFFSET_HI:-?[0-9]+]]([[SP:[0-9]+]])
-; PPC64-DAG: stfd 1, [[OFFSET_LO:-?[0-9]+]]([[SP]])
-; PPC64-DAG: ld [[HI:[0-9]+]], [[OFFSET_LO]]([[SP]])
-; PPC64-DAG: ld [[LO:[0-9]+]], [[OFFSET_HI]]([[SP]])
-; PPC64-DAG: rldicr [[FLIP_BIT:[0-9]+]], [[HI]], 0, 0
-; PPC64-DAG: xor 3, [[HI]], [[FLIP_BIT]]
-; PPC64-DAG: xor 4, [[LO]], [[FLIP_BIT]]
-; PPC64: blr
-
; PPC64-P8-LABEL: test_abs:
-; PPC64-P8-DAG: mffprd [[LO:[0-9]+]], 2
-; PPC64-P8-DAG: mffprd [[HI:[0-9]+]], 1
-; PPC64-P8-DAG: rldicr [[FLIP_BIT:[0-9]+]], [[HI]], 0, 0
-; PPC64-P8-DAG: xor 3, [[HI]], [[FLIP_BIT]]
-; PPC64-P8-DAG: xor 4, [[LO]], [[FLIP_BIT]]
-; PPC64-P8: blr
-
-; PPC32-DAG: stfd 1, 24(1)
-; PPC32-DAG: stfd 2, 16(1)
-; PPC32-DAG: lwz [[HI0:[0-9]+]], 24(1)
-; PPC32-DAG: lwz [[LO0:[0-9]+]], 16(1)
-; PPC32: rlwinm [[FLIP_BIT:[0-9]+]], [[HI0]], 0, 0, 0
-; PPC32-DAG: lwz [[HI1:[0-9]+]], 28(1)
-; PPC32-DAG: lwz [[LO1:[0-9]+]], 20(1)
-; PPC32-DAG: xor [[HI0]], [[HI0]], [[FLIP_BIT]]
-; PPC32-DAG: xor [[LO0]], [[LO0]], [[FLIP_BIT]]
-; PPC32: blr
+; PPC64-P8: # %bb.0: # %entry
+; PPC64-P8-NEXT: mffprd 3, 1
+; PPC64-P8-NEXT: mffprd 4, 2
+; PPC64-P8-NEXT: rldicr 5, 3, 0, 0
+; PPC64-P8-NEXT: xor 3, 3, 5
+; PPC64-P8-NEXT: xor 4, 4, 5
+; PPC64-P8-NEXT: blr
+;
+; PPC64-LABEL: test_abs:
+; PPC64: # %bb.0: # %entry
+; PPC64-NEXT: stfd 1, -16(1)
+; PPC64-NEXT: stfd 2, -8(1)
+; PPC64-NEXT: ld 3, -16(1)
+; PPC64-NEXT: ld 4, -8(1)
+; PPC64-NEXT: rldicr 5, 3, 0, 0
+; PPC64-NEXT: xor 3, 3, 5
+; PPC64-NEXT: xor 4, 4, 5
+; PPC64-NEXT: blr
+;
+; PPC32-LABEL: test_abs:
+; PPC32: # %bb.0: # %entry
+; PPC32-NEXT: stwu 1, -32(1)
+; PPC32-NEXT: stfd 1, 24(1)
+; PPC32-NEXT: stfd 2, 16(1)
+; PPC32-NEXT: lwz 3, 24(1)
+; PPC32-NEXT: lwz 5, 16(1)
+; PPC32-NEXT: rlwinm 7, 3, 0, 0, 0
+; PPC32-NEXT: lwz 4, 28(1)
+; PPC32-NEXT: xor 3, 3, 7
+; PPC32-NEXT: lwz 6, 20(1)
+; PPC32-NEXT: xor 5, 5, 7
+; PPC32-NEXT: addi 1, 1, 32
+; PPC32-NEXT: blr
+entry:
%0 = tail call ppc_fp128 @llvm.fabs.ppcf128(ppc_fp128 %x)
%1 = bitcast ppc_fp128 %0 to i128
ret i128 %1
}
define i128 @test_neg(ppc_fp128 %x) nounwind {
-entry:
-; PPC64-LABEL: test_neg:
-; PPC64-DAG: stfd 2, [[OFFSET_HI:-?[0-9]+]]([[SP:[0-9]+]])
-; PPC64-DAG: stfd 1, [[OFFSET_LO:-?[0-9]+]]([[SP]])
-; PPC64-DAG: li [[FLIP_BIT:[0-9]+]], 1
-; PPC64-DAG: rldic [[RES:[0-9]+]], [[FLIP_BIT]], 63, 0
-; PPC64-DAG: ld [[HI:[0-9]+]], [[OFFSET_LO]]([[SP]])
-; PPC64-DAG: ld [[LO:[0-9]+]], [[OFFSET_HI]]([[SP]])
-; PPC64-NOT: BARRIER
-; PPC64-DAG: xor 3, [[HI]], [[RES]]
-; PPC64-DAG: xor 4, [[LO]], [[RES]]
-; PPC64: blr
-
; PPC64-P8-LABEL: test_neg:
-; PPC64-P8-DAG: mffprd [[LO:[0-9]+]], 2
-; PPC64-P8-DAG: mffprd [[HI:[0-9]+]], 1
-; PPC64-P8-DAG: li [[IMM1:[0-9]+]], 1
-; PPC64-P8-DAG: rldic [[FLIP_BIT:[0-9]+]], [[IMM1]], 63, 0
-; PPC64-P8-NOT: BARRIER
-; PPC64-P8-DAG: xor 3, [[HI]], [[FLIP_BIT]]
-; PPC64-P8-DAG: xor 4, [[LO]], [[FLIP_BIT]]
-; PPC64-P8: blr
-
-; PPC32-DAG: stfd 1, 24(1)
-; PPC32-DAG: stfd 2, 16(1)
-; PPC32-DAG: lwz [[HI0:[0-9]+]], 24(1)
-; PPC32-DAG: lwz [[LO0:[0-9]+]], 16(1)
-; PPC32-DAG: lwz [[HI1:[0-9]+]], 28(1)
-; PPC32-NOT: BARRIER
-; PPC32-DAG: xoris [[HI0]], [[HI0]], 32768
-; PPC32-DAG: lwz [[LO1:[0-9]+]], 20(1)
-; PPC32-DAG: xoris [[LO0]], [[LO0]], 32768
-; PPC32: blr
+; PPC64-P8: # %bb.0: # %entry
+; PPC64-P8-NEXT: li 3, 1
+; PPC64-P8-NEXT: mffprd 4, 2
+; PPC64-P8-NEXT: mffprd 5, 1
+; PPC64-P8-NEXT: rldic 6, 3, 63, 0
+; PPC64-P8-NEXT: xor 4, 4, 6
+; PPC64-P8-NEXT: xor 3, 5, 6
+; PPC64-P8-NEXT: blr
+;
+; PPC64-LABEL: test_neg:
+; PPC64: # %bb.0: # %entry
+; PPC64-NEXT: stfd 2, -8(1)
+; PPC64-NEXT: stfd 1, -16(1)
+; PPC64-NEXT: li 3, 1
+; PPC64-NEXT: ld 4, -8(1)
+; PPC64-NEXT: ld 5, -16(1)
+; PPC64-NEXT: rldic 6, 3, 63, 0
+; PPC64-NEXT: xor 3, 5, 6
+; PPC64-NEXT: xor 4, 4, 6
+; PPC64-NEXT: blr
+;
+; PPC32-LABEL: test_neg:
+; PPC32: # %bb.0: # %entry
+; PPC32-NEXT: stwu 1, -32(1)
+; PPC32-NEXT: stfd 1, 24(1)
+; PPC32-NEXT: stfd 2, 16(1)
+; PPC32-NEXT: lwz 5, 16(1)
+; PPC32-NEXT: lwz 3, 24(1)
+; PPC32-NEXT: lwz 4, 28(1)
+; PPC32-NEXT: xoris 5, 5, 32768
+; PPC32-NEXT: lwz 6, 20(1)
+; PPC32-NEXT: xoris 3, 3, 32768
+; PPC32-NEXT: addi 1, 1, 32
+; PPC32-NEXT: blr
+entry:
%0 = fsub ppc_fp128 0xM80000000000000000000000000000000, %x
%1 = bitcast ppc_fp128 %0 to i128
ret i128 %1
}
define i128 @test_copysign(ppc_fp128 %x) nounwind {
-entry:
-; PPC64-LABEL: test_copysign:
-; PPC64-DAG: stfd 1, [[OFFSET:-?[0-9]+]](1)
-; PPC64-DAG: li [[HI_TMP:[0-9]+]], 16399
-; PPC64-DAG: li [[LO_TMP:[0-9]+]], 3019
-; PPC64-NOT: BARRIER
-; PPC64-DAG: rldic [[CST_HI:[0-9]+]], [[HI_TMP]], 48, 1
-; PPC64-DAG: rldic [[CST_LO:[0-9]+]], [[LO_TMP]], 52, 0
-; PPC64-DAG: ld [[X_HI:[0-9]+]], [[OFFSET]](1)
-; PPC64-DAG: rldicr [[NEW_HI_TMP:[0-9]+]], [[X_HI]], 0, 0
-; PPC64-DAG: or 3, [[NEW_HI_TMP]], [[CST_HI]]
-; PPC64-DAG: xor 4, [[NEW_HI_TMP]], [[CST_LO]]
-; PPC64: blr
-
; PPC64-P8-LABEL: test_copysign:
-; PPC64-P8-DAG: mffprd [[X_HI:[0-9]+]], 1
-; PPC64-P8-DAG: li [[HI_TMP:[0-9]+]], 16399
-; PPC64-P8-DAG: li [[LO_TMP:[0-9]+]], 3019
-; PPC64-P8-NOT: BARRIER
-; PPC64-P8-DAG: rldic [[CST_HI:[0-9]+]], [[HI_TMP]], 48, 1
-; PPC64-P8-DAG: rldic [[CST_LO:[0-9]+]], [[LO_TMP]], 52, 0
-; PPC64-P8-DAG: rldicr [[NEW_HI_TMP:[0-9]+]], [[X_HI]], 0, 0
-; PPC64-P8-DAG: or 3, [[NEW_HI_TMP]], [[CST_HI]]
-; PPC64-P8-DAG: xor 4, [[NEW_HI_TMP]], [[CST_LO]]
-; PPC64-P8: blr
-
-; PPC32: stfd 1, [[STACK:[0-9]+]](1)
-; PPC32: lwz [[HI:[0-9]+]], [[STACK]](1)
-; PPC32: rlwinm [[FLIP_BIT:[0-9]+]], [[HI]], 0, 0, 0
-; PPC32-NOT: BARRIER
-; PPC32-DAG: oris {{[0-9]+}}, [[FLIP_BIT]], 16399
-; PPC32-DAG: xoris {{[0-9]+}}, [[FLIP_BIT]], 48304
-; PPC32: blr
+; PPC64-P8: # %bb.0: # %entry
+; PPC64-P8-NEXT: mffprd 3, 1
+; PPC64-P8-NEXT: li 4, 16399
+; PPC64-P8-NEXT: li 5, 3019
+; PPC64-P8-NEXT: rldicr 6, 3, 0, 0
+; PPC64-P8-NEXT: rldic 3, 4, 48, 1
+; PPC64-P8-NEXT: rldic 4, 5, 52, 0
+; PPC64-P8-NEXT: or 3, 6, 3
+; PPC64-P8-NEXT: xor 4, 6, 4
+; PPC64-P8-NEXT: blr
+;
+; PPC64-LABEL: test_copysign:
+; PPC64: # %bb.0: # %entry
+; PPC64-NEXT: stfd 1, -8(1)
+; PPC64-NEXT: li 4, 16399
+; PPC64-NEXT: li 5, 3019
+; PPC64-NEXT: ld 3, -8(1)
+; PPC64-NEXT: rldicr 6, 3, 0, 0
+; PPC64-NEXT: rldic 3, 4, 48, 1
+; PPC64-NEXT: rldic 4, 5, 52, 0
+; PPC64-NEXT: or 3, 6, 3
+; PPC64-NEXT: xor 4, 6, 4
+; PPC64-NEXT: blr
+;
+; PPC32-LABEL: test_copysign:
+; PPC32: # %bb.0: # %entry
+; PPC32-NEXT: stwu 1, -32(1)
+; PPC32-NEXT: stfd 1, 24(1)
+; PPC32-NEXT: li 6, 0
+; PPC32-NEXT: lwz 3, 24(1)
+; PPC32-NEXT: rlwinm 4, 3, 0, 0, 0
+; PPC32-NEXT: oris 3, 4, 16399
+; PPC32-NEXT: xoris 5, 4, 48304
+; PPC32-NEXT: li 4, 0
+; PPC32-NEXT: addi 1, 1, 32
+; PPC32-NEXT: blr
+entry:
%0 = tail call ppc_fp128 @llvm.copysign.ppcf128(ppc_fp128 0xM400F000000000000BCB0000000000000, ppc_fp128 %x)
%1 = bitcast ppc_fp128 %0 to i128
ret i128 %1
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