[PATCH] D114542: [CodeGen][SVE] Use whilelo instruction when lowering @llvm.get.active.lane.mask

[David Sherwood via Phabricator via llvm-commits]

david-arm added a comment.

Hi @SjoerdMeijer, so after looking into the intrinsic a bit more and talking with @paulwalker-arm, we realised that LoopVectorize.cpp isn't doing any specific overflow checks, which means that when lowering the intrinsic we have to start worrying about overflow. Fortunately for SVE, the `whilelo` instruction actually takes care of overflow already, i.e. there is a 1:1 mapping between the intrinsic and the instruction for many cases. This means that we don't really need to do any of the checks that MVE does for overflow because there is an already efficient way of doing this for SVE. Also, according to the documentation the whilelo instruction takes a start and end value and increments a counter from start to end based on the number of elements requested, i.e. <vscale x 16> elements for a <vscale x 16 x i1> type. So we know exactly which types are safe to map to the instruction and which are not. For some types like <vscale x 32 x i1> (which are illegal and have no mapping) we may also benefit from some of the same checks we do for MVE if we want to improve code quality.



================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:1510
+  if (!Subtarget->hasSVE())
+    return true;
+
----------------
SjoerdMeijer wrote:
> I was expecting `return false` here, now I am a bit confused...
Perhaps the name of the TLI function could be better. What I mean by `lowerGetActiveLaneMask` is lower to generic ISD nodes (UADDO, etc.), and do the overflow checks explicitly. So returning true here means we let SelectionDAGBuilder lower the intrinsic at that point. If we return false here we're basically asking to leave it as an intrinsic.


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