[PATCH] D112852: [GlobalISel] Allow DBG_VALUE to use invalid vregs throughout pipeline

[Jeremy Morse via Phabricator via llvm-commits]

jmorse added a comment.

Drive by comment,

Possibly relevant to the interests of this thread, SelectionDAG will already produce half-formed DBG_VALUEs in it's current implementation. The regression test in the recently landed rGb8f68ad9cdb <https://reviews.llvm.org/rGb8f68ad9cdb11d585acc6c38ad124b32efb6178a>, if run with

  llc llvm/test/DebugInfo/X86/instr-ref-sdag-empty-vreg.ll -o - -stop-before=finalize-isel -experimental-debug-variable-locations=false

produces:

  body:             |
    bb.0.cond.false.i:
      successors: %bb.1(0x80000000)
  
  
    bb.1._ZN4Vec39normalizeEv.exit:
      DBG_VALUE %1:fr32, $noreg, !11, !DIExpression(), debug-location !12
      RET 0, debug-location !12

due to the argument value being optimised out late, leaving a DBG_VALUE referring to an undefined vreg. So I suppose you could say the approach discussed here has precedent.

I wasn't aware that SelectionDAG behaved like this until quite recently. NB: the -experimental...=false flag is the current llc default, I've added it because it might change in the next week or two.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D112852/new/

https://reviews.llvm.org/D112852