[PATCH] D113635: [PowerPC] Allow scalars for asm constraint "v" with VSX

[Amy Kwan via Phabricator via llvm-commits]

amyk added a comment.

I just had a couple minor comments.



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Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:17696
+    unsigned NumParts, MVT PartVT, Optional<CallingConv::ID> CC) const {
+  EVT ValVT = Val.getValueType();
+  if (PartVT == MVT::f64 &&
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Is it possible to add a comment to detail what exactly is going on here for future reference?


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Comment at: llvm/test/CodeGen/PowerPC/scalars-in-altivec-regs.ll:2
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=powerpc64-unknown-aix-xcoff -verify-machineinstrs \
+; RUN:   -mcpu=pwr8 < %s | FileCheck --check-prefix=AIX64 %s
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I think `-ppc-asm-full-reg-names` works with the AIX triple now. It would be good to add this option prior to committing.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D113635/new/

https://reviews.llvm.org/D113635