[PATCH] D114315: [X86][Costmodel] `getReplicationShuffleCost()`: promote 1 bit-wide elements to 32 bit when have AVX512DQ

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


================
Comment at: llvm/lib/Target/X86/X86TargetTransformInfo.cpp:3707
+    if (ST->hasDQI()) {
+      PromEltTyBits = 32; // promote to i32, AVX512F.
+      break;
----------------
lebedev.ri wrote:
> RKSimon wrote:
> > AVX512F or AVX512DQ?
> "<we can> promote to i32, AVX512F <then provides support for shuffling in that type>."
so why not promote for AVX512F only targets?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D114315/new/

https://reviews.llvm.org/D114315