[PATCH] D114351: [AMDGPU] Add SIMemoryLegalizer comments to clarify bit usage (NFC)
Carl Ritson via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Nov 22 01:25:10 PST 2021
critson added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/SIMemoryLegalizer.cpp:878
return Changed;
}
----------------
foad wrote:
> Not really related to your patch, but why do we return here? Doesn't that mean that IsNonTemporal is effectively ignored if IsVolatile is true? Wouldn't it be both better and simpler to fall through to the IsNonTemporal handling here?
This is a good point. From a bit setting perspective it would be fine.
Of course there is the question of what it semantically means to have a volatile nontemporal access when we seem to define volatile as "bypasses all caches".
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D114351/new/
https://reviews.llvm.org/D114351
More information about the llvm-commits
mailing list