[PATCH] D114314: [X86][TTI] Costmodel for AVX512DQ's VPMOVM2[DQ] / VPMOV[DQ]2M instructions

Sat Nov 20 08:45:48 PST 2021

RKSimon added a comment.

In D114314#3144547 <https://reviews.llvm.org/D114314#3144547>, @lebedev.ri wrote:

> In D114314#3144546 <https://reviews.llvm.org/D114314#3144546>, @tschuett wrote:
>
>> I remember that there was a discussion using tablegen and the scheduling models to create these cost models. The discussion stoped. Having one diff per instruction does not scale.
>
> Yep.

Its even worse than that - the cost tables ignore many hw specific facts such that some ops can be run on multiple pipes (so a throughput cost of 1 might actually be 1/4 of that.....), and that usually we want accumulative costs of an entire code sequence, which the InstructionCost class can't do as it'd have to internally track some kind of llvm-mca like state. I've tried to work on stop gap solutions such as D46276 <https://reviews.llvm.org/D46276> and D103695 <https://reviews.llvm.org/D103695>, but they rely on high quality scheduler models, which we just don't have yet (although D103695 <https://reviews.llvm.org/D103695> has proved to be useful to iteratively fix the models as well as the cost tables).

So, first step would be to ensure we have decent scheduler models for all relevant x86 cpus, but there's many steps after that :(

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