[llvm] da47a63 - [NFC][X86][Costmodel] Add AVX512DQ runlines to trunc.ll/extend.ll
Roman Lebedev via llvm-commits
llvm-commits at lists.llvm.org
Sat Nov 20 02:56:01 PST 2021
Author: Roman Lebedev
Date: 2021-11-20T13:55:13+03:00
New Revision: da47a63e039428fdf8f827381fa87c84f36581ef
URL: https://github.com/llvm/llvm-project/commit/da47a63e039428fdf8f827381fa87c84f36581ef
DIFF: https://github.com/llvm/llvm-project/commit/da47a63e039428fdf8f827381fa87c84f36581ef.diff
LOG: [NFC][X86][Costmodel] Add AVX512DQ runlines to trunc.ll/extend.ll
Added:
Modified:
llvm/test/Analysis/CostModel/X86/extend.ll
llvm/test/Analysis/CostModel/X86/trunc.ll
Removed:
################################################################################
diff --git a/llvm/test/Analysis/CostModel/X86/extend.ll b/llvm/test/Analysis/CostModel/X86/extend.ll
index 43769dd3284c..73bad1793031 100644
--- a/llvm/test/Analysis/CostModel/X86/extend.ll
+++ b/llvm/test/Analysis/CostModel/X86/extend.ll
@@ -5,6 +5,7 @@
; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx | FileCheck %s --check-prefixes=AVX1
; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx2 | FileCheck %s --check-prefixes=AVX2
; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx512f | FileCheck %s --check-prefixes=AVX512,AVX512F
+; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx512f,+avx512dq | FileCheck %s --check-prefixes=AVX512,AVX512DQ
; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=AVX512,AVX512BW
;
; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mcpu=slm | FileCheck %s --check-prefixes=SSE,SSE42
@@ -369,6 +370,33 @@ define i32 @zext_vXi8() {
; AVX512F-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %V128i16 = zext <128 x i8> undef to <128 x i16>
; AVX512F-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
;
+; AVX512DQ-LABEL: 'zext_vXi8'
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = zext i8 undef to i64
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = zext <2 x i8> undef to <2 x i64>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = zext <4 x i8> undef to <4 x i64>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8i64 = zext <8 x i8> undef to <8 x i64>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V16i64 = zext <16 x i8> undef to <16 x i64>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V32i64 = zext <32 x i8> undef to <32 x i64>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %V64i64 = zext <64 x i8> undef to <64 x i64>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 30 for instruction: %V128i64 = zext <128 x i8> undef to <128 x i64>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = zext i8 undef to i32
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = zext <2 x i8> undef to <2 x i32>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = zext <4 x i8> undef to <4 x i32>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8i32 = zext <8 x i8> undef to <8 x i32>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16i32 = zext <16 x i8> undef to <16 x i32>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V32i32 = zext <32 x i8> undef to <32 x i32>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V64i32 = zext <64 x i8> undef to <64 x i32>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %V128i32 = zext <128 x i8> undef to <128 x i32>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = zext i8 undef to i16
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2i16 = zext <2 x i8> undef to <2 x i16>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4i16 = zext <4 x i8> undef to <4 x i16>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8i16 = zext <8 x i8> undef to <8 x i16>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16i16 = zext <16 x i8> undef to <16 x i16>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V32i16 = zext <32 x i8> undef to <32 x i16>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V64i16 = zext <64 x i8> undef to <64 x i16>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %V128i16 = zext <128 x i8> undef to <128 x i16>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
+;
; AVX512BW-LABEL: 'zext_vXi8'
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = zext i8 undef to i64
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = zext <2 x i8> undef to <2 x i64>
@@ -664,6 +692,41 @@ define i32 @zext_vXi1() {
; AVX512F-NEXT: Cost Model: Found an estimated cost of 38 for instruction: %V128i8 = zext <128 x i1> undef to <128 x i8>
; AVX512F-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
;
+; AVX512DQ-LABEL: 'zext_vXi1'
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = zext i1 undef to i64
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2i64 = zext <2 x i1> undef to <2 x i64>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4i64 = zext <4 x i1> undef to <4 x i64>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8i64 = zext <8 x i1> undef to <8 x i64>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V16i64 = zext <16 x i1> undef to <16 x i64>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V32i64 = zext <32 x i1> undef to <32 x i64>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %V64i64 = zext <64 x i1> undef to <64 x i64>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 40 for instruction: %V128i64 = zext <128 x i1> undef to <128 x i64>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = zext i1 undef to i32
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2i32 = zext <2 x i1> undef to <2 x i32>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4i32 = zext <4 x i1> undef to <4 x i32>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8i32 = zext <8 x i1> undef to <8 x i32>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16i32 = zext <16 x i1> undef to <16 x i32>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V32i32 = zext <32 x i1> undef to <32 x i32>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V64i32 = zext <64 x i1> undef to <64 x i32>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V128i32 = zext <128 x i1> undef to <128 x i32>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = zext i1 undef to i16
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V2i16 = zext <2 x i1> undef to <2 x i16>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4i16 = zext <4 x i1> undef to <4 x i16>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8i16 = zext <8 x i1> undef to <8 x i16>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16i16 = zext <16 x i1> undef to <16 x i16>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %V32i16 = zext <32 x i1> undef to <32 x i16>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %V64i16 = zext <64 x i1> undef to <64 x i16>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %V128i16 = zext <128 x i1> undef to <128 x i16>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = zext i1 undef to i8
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V2i8 = zext <2 x i1> undef to <2 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4i8 = zext <4 x i1> undef to <4 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8i8 = zext <8 x i1> undef to <8 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16i8 = zext <16 x i1> undef to <16 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %V32i8 = zext <32 x i1> undef to <32 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 19 for instruction: %V64i8 = zext <64 x i1> undef to <64 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 38 for instruction: %V128i8 = zext <128 x i1> undef to <128 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
+;
; AVX512BW-LABEL: 'zext_vXi1'
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = zext i1 undef to i64
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2i64 = zext <2 x i1> undef to <2 x i64>
@@ -1149,6 +1212,33 @@ define i32 @sext_vXi8() {
; AVX512F-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %V128i16 = sext <128 x i8> undef to <128 x i16>
; AVX512F-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
;
+; AVX512DQ-LABEL: 'sext_vXi8'
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i8 undef to i64
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = sext <2 x i8> undef to <2 x i64>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = sext <4 x i8> undef to <4 x i64>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8i64 = sext <8 x i8> undef to <8 x i64>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V16i64 = sext <16 x i8> undef to <16 x i64>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V32i64 = sext <32 x i8> undef to <32 x i64>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %V64i64 = sext <64 x i8> undef to <64 x i64>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 30 for instruction: %V128i64 = sext <128 x i8> undef to <128 x i64>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = sext i8 undef to i32
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = sext <2 x i8> undef to <2 x i32>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = sext <4 x i8> undef to <4 x i32>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8i32 = sext <8 x i8> undef to <8 x i32>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16i32 = sext <16 x i8> undef to <16 x i32>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V32i32 = sext <32 x i8> undef to <32 x i32>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V64i32 = sext <64 x i8> undef to <64 x i32>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %V128i32 = sext <128 x i8> undef to <128 x i32>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = sext i8 undef to i16
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2i16 = sext <2 x i8> undef to <2 x i16>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4i16 = sext <4 x i8> undef to <4 x i16>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8i16 = sext <8 x i8> undef to <8 x i16>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16i16 = sext <16 x i8> undef to <16 x i16>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V32i16 = sext <32 x i8> undef to <32 x i16>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V64i16 = sext <64 x i8> undef to <64 x i16>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %V128i16 = sext <128 x i8> undef to <128 x i16>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
+;
; AVX512BW-LABEL: 'sext_vXi8'
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i8 undef to i64
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = sext <2 x i8> undef to <2 x i64>
@@ -1444,6 +1534,41 @@ define i32 @sext_vXi1() {
; AVX512F-NEXT: Cost Model: Found an estimated cost of 30 for instruction: %V128i8 = sext <128 x i1> undef to <128 x i8>
; AVX512F-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
;
+; AVX512DQ-LABEL: 'sext_vXi1'
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i1 undef to i64
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = sext <2 x i1> undef to <2 x i64>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = sext <4 x i1> undef to <4 x i64>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8i64 = sext <8 x i1> undef to <8 x i64>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V16i64 = sext <16 x i1> undef to <16 x i64>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V32i64 = sext <32 x i1> undef to <32 x i64>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %V64i64 = sext <64 x i1> undef to <64 x i64>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %V128i64 = sext <128 x i1> undef to <128 x i64>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = sext i1 undef to i32
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = sext <2 x i1> undef to <2 x i32>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = sext <4 x i1> undef to <4 x i32>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8i32 = sext <8 x i1> undef to <8 x i32>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16i32 = sext <16 x i1> undef to <16 x i32>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V32i32 = sext <32 x i1> undef to <32 x i32>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V64i32 = sext <64 x i1> undef to <64 x i32>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V128i32 = sext <128 x i1> undef to <128 x i32>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = sext i1 undef to i16
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V2i16 = sext <2 x i1> undef to <2 x i16>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V4i16 = sext <4 x i1> undef to <4 x i16>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V8i16 = sext <8 x i1> undef to <8 x i16>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V16i16 = sext <16 x i1> undef to <16 x i16>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V32i16 = sext <32 x i1> undef to <32 x i16>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %V64i16 = sext <64 x i1> undef to <64 x i16>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 28 for instruction: %V128i16 = sext <128 x i1> undef to <128 x i16>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I8 = sext i1 undef to i8
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V2i8 = sext <2 x i1> undef to <2 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V4i8 = sext <4 x i1> undef to <4 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V8i8 = sext <8 x i1> undef to <8 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V16i8 = sext <16 x i1> undef to <16 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V32i8 = sext <32 x i1> undef to <32 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %V64i8 = sext <64 x i1> undef to <64 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 30 for instruction: %V128i8 = sext <128 x i1> undef to <128 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
+;
; AVX512BW-LABEL: 'sext_vXi1'
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = sext i1 undef to i64
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = sext <2 x i1> undef to <2 x i64>
diff --git a/llvm/test/Analysis/CostModel/X86/trunc.ll b/llvm/test/Analysis/CostModel/X86/trunc.ll
index c0b295bd7c23..d506b9bc1d4e 100644
--- a/llvm/test/Analysis/CostModel/X86/trunc.ll
+++ b/llvm/test/Analysis/CostModel/X86/trunc.ll
@@ -5,6 +5,7 @@
; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx | FileCheck %s --check-prefixes=AVX1
; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx2 | FileCheck %s --check-prefixes=AVX2
; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx512f,avx512vl | FileCheck %s --check-prefixes=AVX512,AVX512F
+; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx512dq,avx512vl | FileCheck %s --check-prefixes=AVX512,AVX512DQ
; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx512bw,avx512vl | FileCheck %s --check-prefixes=AVX512,AVX512BW
;
; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-apple-macosx10.8.0 -mcpu=slm | FileCheck %s --check-prefixes=SSE,SSE42
@@ -1212,6 +1213,108 @@ define i32 @trunc_vXi8() {
; AVX512F-NEXT: Cost Model: Found an estimated cost of 256 for instruction: %V1024i16 = trunc <1024 x i16> undef to <1024 x i8>
; AVX512F-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
;
+; AVX512DQ-LABEL: 'trunc_vXi8'
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %i64 = trunc i64 undef to i8
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2i64 = trunc <2 x i64> undef to <2 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4i64 = trunc <4 x i64> undef to <4 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V6i64 = trunc <6 x i64> undef to <6 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8i64 = trunc <8 x i64> undef to <8 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V10i64 = trunc <10 x i64> undef to <10 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V12i64 = trunc <12 x i64> undef to <12 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V14i64 = trunc <14 x i64> undef to <14 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V16i64 = trunc <16 x i64> undef to <16 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V20i64 = trunc <20 x i64> undef to <20 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V24i64 = trunc <24 x i64> undef to <24 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V28i64 = trunc <28 x i64> undef to <28 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V32i64 = trunc <32 x i64> undef to <32 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V40i64 = trunc <40 x i64> undef to <40 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V48i64 = trunc <48 x i64> undef to <48 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V56i64 = trunc <56 x i64> undef to <56 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V64i64 = trunc <64 x i64> undef to <64 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %V80i64 = trunc <80 x i64> undef to <80 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %V96i64 = trunc <96 x i64> undef to <96 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %V112i64 = trunc <112 x i64> undef to <112 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %V128i64 = trunc <128 x i64> undef to <128 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 64 for instruction: %V160i64 = trunc <160 x i64> undef to <160 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 64 for instruction: %V192i64 = trunc <192 x i64> undef to <192 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 64 for instruction: %V224i64 = trunc <224 x i64> undef to <224 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 64 for instruction: %V256i64 = trunc <256 x i64> undef to <256 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 128 for instruction: %V320i64 = trunc <320 x i64> undef to <320 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 128 for instruction: %V384i64 = trunc <384 x i64> undef to <384 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 128 for instruction: %V448i64 = trunc <448 x i64> undef to <448 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 128 for instruction: %V512i64 = trunc <512 x i64> undef to <512 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 256 for instruction: %V640i64 = trunc <640 x i64> undef to <640 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 256 for instruction: %V768i64 = trunc <768 x i64> undef to <768 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 256 for instruction: %V896i64 = trunc <896 x i64> undef to <896 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 256 for instruction: %V1024i64 = trunc <1024 x i64> undef to <1024 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %i32 = trunc i32 undef to i8
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2i32 = trunc <2 x i32> undef to <2 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4i32 = trunc <4 x i32> undef to <4 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V6i32 = trunc <6 x i32> undef to <6 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8i32 = trunc <8 x i32> undef to <8 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V10i32 = trunc <10 x i32> undef to <10 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V12i32 = trunc <12 x i32> undef to <12 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V14i32 = trunc <14 x i32> undef to <14 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16i32 = trunc <16 x i32> undef to <16 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V20i32 = trunc <20 x i32> undef to <20 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V24i32 = trunc <24 x i32> undef to <24 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V28i32 = trunc <28 x i32> undef to <28 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V32i32 = trunc <32 x i32> undef to <32 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V40i32 = trunc <40 x i32> undef to <40 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V48i32 = trunc <48 x i32> undef to <48 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V56i32 = trunc <56 x i32> undef to <56 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V64i32 = trunc <64 x i32> undef to <64 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V80i32 = trunc <80 x i32> undef to <80 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V96i32 = trunc <96 x i32> undef to <96 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V112i32 = trunc <112 x i32> undef to <112 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V128i32 = trunc <128 x i32> undef to <128 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %V160i32 = trunc <160 x i32> undef to <160 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %V192i32 = trunc <192 x i32> undef to <192 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %V224i32 = trunc <224 x i32> undef to <224 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %V256i32 = trunc <256 x i32> undef to <256 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 64 for instruction: %V320i32 = trunc <320 x i32> undef to <320 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 64 for instruction: %V384i32 = trunc <384 x i32> undef to <384 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 64 for instruction: %V448i32 = trunc <448 x i32> undef to <448 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 64 for instruction: %V512i32 = trunc <512 x i32> undef to <512 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 128 for instruction: %V640i32 = trunc <640 x i32> undef to <640 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 128 for instruction: %V768i32 = trunc <768 x i32> undef to <768 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 128 for instruction: %V896i32 = trunc <896 x i32> undef to <896 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 128 for instruction: %V1024i32 = trunc <1024 x i32> undef to <1024 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %i16 = trunc i16 undef to i8
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2i16 = trunc <2 x i16> undef to <2 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4i16 = trunc <4 x i16> undef to <4 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V6i16 = trunc <6 x i16> undef to <6 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8i16 = trunc <8 x i16> undef to <8 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V10i16 = trunc <10 x i16> undef to <10 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V12i16 = trunc <12 x i16> undef to <12 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V14i16 = trunc <14 x i16> undef to <14 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V16i16 = trunc <16 x i16> undef to <16 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V20i16 = trunc <20 x i16> undef to <20 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V24i16 = trunc <24 x i16> undef to <24 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V28i16 = trunc <28 x i16> undef to <28 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V32i16 = trunc <32 x i16> undef to <32 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V40i16 = trunc <40 x i16> undef to <40 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V48i16 = trunc <48 x i16> undef to <48 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V56i16 = trunc <56 x i16> undef to <56 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V64i16 = trunc <64 x i16> undef to <64 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %V80i16 = trunc <80 x i16> undef to <80 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %V96i16 = trunc <96 x i16> undef to <96 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %V112i16 = trunc <112 x i16> undef to <112 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %V128i16 = trunc <128 x i16> undef to <128 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 64 for instruction: %V160i16 = trunc <160 x i16> undef to <160 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 64 for instruction: %V192i16 = trunc <192 x i16> undef to <192 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 64 for instruction: %V224i16 = trunc <224 x i16> undef to <224 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 64 for instruction: %V256i16 = trunc <256 x i16> undef to <256 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 128 for instruction: %V320i16 = trunc <320 x i16> undef to <320 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 128 for instruction: %V384i16 = trunc <384 x i16> undef to <384 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 128 for instruction: %V448i16 = trunc <448 x i16> undef to <448 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 128 for instruction: %V512i16 = trunc <512 x i16> undef to <512 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 256 for instruction: %V640i16 = trunc <640 x i16> undef to <640 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 256 for instruction: %V768i16 = trunc <768 x i16> undef to <768 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 256 for instruction: %V896i16 = trunc <896 x i16> undef to <896 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 256 for instruction: %V1024i16 = trunc <1024 x i16> undef to <1024 x i8>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
+;
; AVX512BW-LABEL: 'trunc_vXi8'
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %i64 = trunc i64 undef to i8
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2i64 = trunc <2 x i64> undef to <2 x i8>
@@ -2380,6 +2483,149 @@ define i32 @trunc_vXi1() {
; AVX512F-NEXT: Cost Model: Found an estimated cost of 240 for instruction: %V1024i8 = trunc <1024 x i8> undef to <1024 x i1>
; AVX512F-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
;
+; AVX512DQ-LABEL: 'trunc_vXi1'
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %i64 = trunc i64 undef to i1
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2i64 = trunc <2 x i64> undef to <2 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V3i64 = trunc <3 x i64> undef to <3 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4i64 = trunc <4 x i64> undef to <4 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V5i64 = trunc <5 x i64> undef to <5 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V6i64 = trunc <6 x i64> undef to <6 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V7i64 = trunc <7 x i64> undef to <7 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8i64 = trunc <8 x i64> undef to <8 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %V10i64 = trunc <10 x i64> undef to <10 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 24 for instruction: %V12i64 = trunc <12 x i64> undef to <12 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 28 for instruction: %V14i64 = trunc <14 x i64> undef to <14 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %V16i64 = trunc <16 x i64> undef to <16 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 40 for instruction: %V20i64 = trunc <20 x i64> undef to <20 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %V24i64 = trunc <24 x i64> undef to <24 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 56 for instruction: %V28i64 = trunc <28 x i64> undef to <28 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %V32i64 = trunc <32 x i64> undef to <32 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 80 for instruction: %V40i64 = trunc <40 x i64> undef to <40 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 96 for instruction: %V48i64 = trunc <48 x i64> undef to <48 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 112 for instruction: %V56i64 = trunc <56 x i64> undef to <56 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 44 for instruction: %V64i64 = trunc <64 x i64> undef to <64 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 160 for instruction: %V80i64 = trunc <80 x i64> undef to <80 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 224 for instruction: %V112i64 = trunc <112 x i64> undef to <112 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 88 for instruction: %V128i64 = trunc <128 x i64> undef to <128 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 320 for instruction: %V160i64 = trunc <160 x i64> undef to <160 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 384 for instruction: %V192i64 = trunc <192 x i64> undef to <192 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 448 for instruction: %V224i64 = trunc <224 x i64> undef to <224 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 176 for instruction: %V256i64 = trunc <256 x i64> undef to <256 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 640 for instruction: %V320i64 = trunc <320 x i64> undef to <320 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 768 for instruction: %V384i64 = trunc <384 x i64> undef to <384 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 896 for instruction: %V448i64 = trunc <448 x i64> undef to <448 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 352 for instruction: %V512i64 = trunc <512 x i64> undef to <512 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1280 for instruction: %V640i64 = trunc <640 x i64> undef to <640 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1536 for instruction: %V768i64 = trunc <768 x i64> undef to <768 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1792 for instruction: %V896i64 = trunc <896 x i64> undef to <896 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 704 for instruction: %V1024i64 = trunc <1024 x i64> undef to <1024 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %i32 = trunc i32 undef to i1
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2i32 = trunc <2 x i32> undef to <2 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V3i32 = trunc <3 x i32> undef to <3 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4i32 = trunc <4 x i32> undef to <4 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V5i32 = trunc <5 x i32> undef to <5 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V6i32 = trunc <6 x i32> undef to <6 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V7i32 = trunc <7 x i32> undef to <7 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8i32 = trunc <8 x i32> undef to <8 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V10i32 = trunc <10 x i32> undef to <10 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V12i32 = trunc <12 x i32> undef to <12 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V14i32 = trunc <14 x i32> undef to <14 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16i32 = trunc <16 x i32> undef to <16 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V20i32 = trunc <20 x i32> undef to <20 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V24i32 = trunc <24 x i32> undef to <24 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V28i32 = trunc <28 x i32> undef to <28 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V32i32 = trunc <32 x i32> undef to <32 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V40i32 = trunc <40 x i32> undef to <40 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V48i32 = trunc <48 x i32> undef to <48 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V56i32 = trunc <56 x i32> undef to <56 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V64i32 = trunc <64 x i32> undef to <64 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V80i32 = trunc <80 x i32> undef to <80 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V112i32 = trunc <112 x i32> undef to <112 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V128i32 = trunc <128 x i32> undef to <128 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %V160i32 = trunc <160 x i32> undef to <160 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %V192i32 = trunc <192 x i32> undef to <192 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %V224i32 = trunc <224 x i32> undef to <224 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 32 for instruction: %V256i32 = trunc <256 x i32> undef to <256 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 64 for instruction: %V320i32 = trunc <320 x i32> undef to <320 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 64 for instruction: %V384i32 = trunc <384 x i32> undef to <384 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 64 for instruction: %V448i32 = trunc <448 x i32> undef to <448 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 64 for instruction: %V512i32 = trunc <512 x i32> undef to <512 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 128 for instruction: %V640i32 = trunc <640 x i32> undef to <640 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 128 for instruction: %V768i32 = trunc <768 x i32> undef to <768 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 128 for instruction: %V896i32 = trunc <896 x i32> undef to <896 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 128 for instruction: %V1024i32 = trunc <1024 x i32> undef to <1024 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %i16 = trunc i16 undef to i1
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V2i16 = trunc <2 x i16> undef to <2 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V3i16 = trunc <3 x i16> undef to <3 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V4i16 = trunc <4 x i16> undef to <4 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V5i16 = trunc <5 x i16> undef to <5 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V6i16 = trunc <6 x i16> undef to <6 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V7i16 = trunc <7 x i16> undef to <7 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V8i16 = trunc <8 x i16> undef to <8 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V10i16 = trunc <10 x i16> undef to <10 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V12i16 = trunc <12 x i16> undef to <12 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V14i16 = trunc <14 x i16> undef to <14 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V16i16 = trunc <16 x i16> undef to <16 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 40 for instruction: %V20i16 = trunc <20 x i16> undef to <20 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %V24i16 = trunc <24 x i16> undef to <24 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 56 for instruction: %V28i16 = trunc <28 x i16> undef to <28 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V32i16 = trunc <32 x i16> undef to <32 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 80 for instruction: %V40i16 = trunc <40 x i16> undef to <40 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 96 for instruction: %V48i16 = trunc <48 x i16> undef to <48 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 112 for instruction: %V56i16 = trunc <56 x i16> undef to <56 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %V64i16 = trunc <64 x i16> undef to <64 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 160 for instruction: %V80i16 = trunc <80 x i16> undef to <80 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 224 for instruction: %V112i16 = trunc <112 x i16> undef to <112 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 28 for instruction: %V128i16 = trunc <128 x i16> undef to <128 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 320 for instruction: %V160i16 = trunc <160 x i16> undef to <160 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 384 for instruction: %V192i16 = trunc <192 x i16> undef to <192 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 448 for instruction: %V224i16 = trunc <224 x i16> undef to <224 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 56 for instruction: %V256i16 = trunc <256 x i16> undef to <256 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 640 for instruction: %V320i16 = trunc <320 x i16> undef to <320 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 768 for instruction: %V384i16 = trunc <384 x i16> undef to <384 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 896 for instruction: %V448i16 = trunc <448 x i16> undef to <448 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 112 for instruction: %V512i16 = trunc <512 x i16> undef to <512 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1280 for instruction: %V640i16 = trunc <640 x i16> undef to <640 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1536 for instruction: %V768i16 = trunc <768 x i16> undef to <768 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1792 for instruction: %V896i16 = trunc <896 x i16> undef to <896 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 224 for instruction: %V1024i16 = trunc <1024 x i16> undef to <1024 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %i8 = trunc i8 undef to i1
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V2i8 = trunc <2 x i8> undef to <2 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V3i8 = trunc <3 x i8> undef to <3 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V4i8 = trunc <4 x i8> undef to <4 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V5i8 = trunc <5 x i8> undef to <5 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %V6i8 = trunc <6 x i8> undef to <6 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %V7i8 = trunc <7 x i8> undef to <7 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V8i8 = trunc <8 x i8> undef to <8 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V10i8 = trunc <10 x i8> undef to <10 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V12i8 = trunc <12 x i8> undef to <12 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V14i8 = trunc <14 x i8> undef to <14 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V16i8 = trunc <16 x i8> undef to <16 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 40 for instruction: %V20i8 = trunc <20 x i8> undef to <20 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 48 for instruction: %V24i8 = trunc <24 x i8> undef to <24 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 56 for instruction: %V28i8 = trunc <28 x i8> undef to <28 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V32i8 = trunc <32 x i8> undef to <32 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 80 for instruction: %V40i8 = trunc <40 x i8> undef to <40 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 96 for instruction: %V48i8 = trunc <48 x i8> undef to <48 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 112 for instruction: %V56i8 = trunc <56 x i8> undef to <56 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 15 for instruction: %V64i8 = trunc <64 x i8> undef to <64 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 160 for instruction: %V80i8 = trunc <80 x i8> undef to <80 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 224 for instruction: %V112i8 = trunc <112 x i8> undef to <112 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 30 for instruction: %V128i8 = trunc <128 x i8> undef to <128 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 320 for instruction: %V160i8 = trunc <160 x i8> undef to <160 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 384 for instruction: %V192i8 = trunc <192 x i8> undef to <192 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 448 for instruction: %V224i8 = trunc <224 x i8> undef to <224 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 60 for instruction: %V256i8 = trunc <256 x i8> undef to <256 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 640 for instruction: %V320i8 = trunc <320 x i8> undef to <320 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 768 for instruction: %V384i8 = trunc <384 x i8> undef to <384 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 896 for instruction: %V448i8 = trunc <448 x i8> undef to <448 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 120 for instruction: %V512i8 = trunc <512 x i8> undef to <512 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1280 for instruction: %V640i8 = trunc <640 x i8> undef to <640 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1536 for instruction: %V768i8 = trunc <768 x i8> undef to <768 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 1792 for instruction: %V896i8 = trunc <896 x i8> undef to <896 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 240 for instruction: %V1024i8 = trunc <1024 x i8> undef to <1024 x i1>
+; AVX512DQ-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
+;
; AVX512BW-LABEL: 'trunc_vXi1'
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %i64 = trunc i64 undef to i1
; AVX512BW-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2i64 = trunc <2 x i64> undef to <2 x i1>
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