[llvm] 1cb991e - [X86] Add test case for pr52567. NFC

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Fri Nov 19 21:51:18 PST 2021


Author: Craig Topper
Date: 2021-11-19T21:45:23-08:00
New Revision: 1cb991e754053ce2b5d551eb6c1a0ce759ab381e

URL: https://github.com/llvm/llvm-project/commit/1cb991e754053ce2b5d551eb6c1a0ce759ab381e
DIFF: https://github.com/llvm/llvm-project/commit/1cb991e754053ce2b5d551eb6c1a0ce759ab381e.diff

LOG: [X86] Add test case for pr52567. NFC

Added: 
    llvm/test/CodeGen/X86/pr52567.ll

Modified: 
    

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/X86/pr52567.ll b/llvm/test/CodeGen/X86/pr52567.ll
new file mode 100644
index 0000000000000..d18efbe93abde
--- /dev/null
+++ b/llvm/test/CodeGen/X86/pr52567.ll
@@ -0,0 +1,28 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
+
+; The and in the test below discards half the bits from vector icmp result.
+; FIXME: The generated code is using a movmskps, but fails to discard bits
+; 2 and 3 before the testl.
+
+define i32 @foo(<4 x float> %arg) {
+; CHECK-LABEL: foo:
+; CHECK:       # %bb.0: # %bb
+; CHECK-NEXT:    movaps {{.*#+}} xmm1 = [1.00000005E-3,1.00000005E-3,1.00000005E-3,1.00000005E-3]
+; CHECK-NEXT:    cmpltps %xmm0, %xmm1
+; CHECK-NEXT:    movmskps %xmm1, %ecx
+; CHECK-NEXT:    xorl %eax, %eax
+; CHECK-NEXT:    testl %ecx, %ecx
+; CHECK-NEXT:    sete %al
+; CHECK-NEXT:    retq
+bb:
+  %tmp = fcmp ogt <4 x float> %arg, <float 0x3F50624DE0000000, float 0x3F50624DE0000000, float 0x3F50624DE0000000, float 0x3F50624DE0000000>
+  %tmp1 = sext <4 x i1> %tmp to <4 x i32>
+  %tmp2 = bitcast <4 x i32> %tmp1 to <16 x i8>
+  %tmp3 = icmp slt <16 x i8> %tmp2, zeroinitializer
+  %tmp4 = bitcast <16 x i1> %tmp3 to i16
+  %tmp5 = and i16 %tmp4, 255
+  %tmp6 = icmp eq i16 %tmp5, 0
+  %tmp7 = zext i1 %tmp6 to i32
+  ret i32 %tmp7
+}


        


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