[llvm] 491efa7 - [InstCombine] add/adjust tests for mask of sext i1; NFC

[Sanjay Patel via llvm-commits]

Author: Sanjay Patel
Date: 2021-11-19T16:07:18-05:00
New Revision: 491efa7f31cbc39fe0aaad261a840cc5311346fb

URL: https://github.com/llvm/llvm-project/commit/491efa7f31cbc39fe0aaad261a840cc5311346fb
DIFF: https://github.com/llvm/llvm-project/commit/491efa7f31cbc39fe0aaad261a840cc5311346fb.diff

LOG: [InstCombine] add/adjust tests for mask of sext i1; NFC

These are sibling transforms, but the test coverage was
uneven and incomplete.

Added: 
    

Modified: 
    llvm/test/Transforms/InstCombine/and.ll
    llvm/test/Transforms/InstCombine/or.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/InstCombine/and.ll b/llvm/test/Transforms/InstCombine/and.ll
index 392d752e40a76..92e5a75eb47f3 100644
--- a/llvm/test/Transforms/InstCombine/and.ll
+++ b/llvm/test/Transforms/InstCombine/and.ll
@@ -1460,3 +1460,51 @@ define i8 @lshr_bitwidth_mask(i8 %x, i8 %y) {
   %r = and i8 %sign, %y
   ret i8 %r
 }
+
+define i32 @sext_to_sel(i32 %x, i1 %y) {
+; CHECK-LABEL: @sext_to_sel(
+; CHECK-NEXT:    [[R:%.*]] = select i1 [[Y:%.*]], i32 [[X:%.*]], i32 0
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %sext = sext i1 %y to i32
+  %r = and i32 %sext, %x
+  ret i32 %r
+}
+
+define <2 x i32> @sext_to_sel_swap(<2 x i32> %px, <2 x i1> %y) {
+; CHECK-LABEL: @sext_to_sel_swap(
+; CHECK-NEXT:    [[X:%.*]] = mul <2 x i32> [[PX:%.*]], [[PX]]
+; CHECK-NEXT:    [[R:%.*]] = select <2 x i1> [[Y:%.*]], <2 x i32> [[X]], <2 x i32> zeroinitializer
+; CHECK-NEXT:    ret <2 x i32> [[R]]
+;
+  %x = mul <2 x i32> %px, %px ; thwart complexity-based canonicalization
+  %sext = sext <2 x i1> %y to <2 x i32>
+  %r = and <2 x i32> %x, %sext
+  ret <2 x i32> %r
+}
+
+define i32 @sext_to_sel_multi_use(i32 %x, i1 %y) {
+; CHECK-LABEL: @sext_to_sel_multi_use(
+; CHECK-NEXT:    [[SEXT:%.*]] = sext i1 [[Y:%.*]] to i32
+; CHECK-NEXT:    call void @use32(i32 [[SEXT]])
+; CHECK-NEXT:    [[R:%.*]] = and i32 [[SEXT]], [[X:%.*]]
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %sext = sext i1 %y to i32
+  call void @use32(i32 %sext)
+  %r = and i32 %sext, %x
+  ret i32 %r
+}
+
+define i32 @sext_to_sel_multi_use_constant_mask(i1 %y) {
+; CHECK-LABEL: @sext_to_sel_multi_use_constant_mask(
+; CHECK-NEXT:    [[SEXT:%.*]] = sext i1 [[Y:%.*]] to i32
+; CHECK-NEXT:    call void @use32(i32 [[SEXT]])
+; CHECK-NEXT:    [[R:%.*]] = and i32 [[SEXT]], 42
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %sext = sext i1 %y to i32
+  call void @use32(i32 %sext)
+  %r = and i32 %sext, 42
+  ret i32 %r
+}

diff  --git a/llvm/test/Transforms/InstCombine/or.ll b/llvm/test/Transforms/InstCombine/or.ll
index 01ffdacda7a88..9fd61eba759cd 100644
--- a/llvm/test/Transforms/InstCombine/or.ll
+++ b/llvm/test/Transforms/InstCombine/or.ll
@@ -608,57 +608,52 @@ define <2 x i1> @test38_nonuniform(<2 x i32> %x) {
   ret <2 x i1> %ret1
 }
 
-define i32 @orsext_to_sel(i32 %x, i1 %y) {
-; CHECK-LABEL: @orsext_to_sel(
-; CHECK-NEXT:    [[OR:%.*]] = select i1 [[Y:%.*]], i32 -1, i32 [[X:%.*]]
-; CHECK-NEXT:    ret i32 [[OR]]
+define i32 @sext_to_sel(i32 %x, i1 %y) {
+; CHECK-LABEL: @sext_to_sel(
+; CHECK-NEXT:    [[R:%.*]] = select i1 [[Y:%.*]], i32 -1, i32 [[X:%.*]]
+; CHECK-NEXT:    ret i32 [[R]]
 ;
   %sext = sext i1 %y to i32
-  %or = or i32 %sext, %x
-  ret i32 %or
+  %r = or i32 %sext, %x
+  ret i32 %r
 }
 
-define i32 @orsext_to_sel_swap(i32 %x, i1 %y) {
-; CHECK-LABEL: @orsext_to_sel_swap(
-; CHECK-NEXT:    [[OR:%.*]] = select i1 [[Y:%.*]], i32 -1, i32 [[X:%.*]]
-; CHECK-NEXT:    ret i32 [[OR]]
+define <2 x i32> @sext_to_sel_swap(<2 x i32> %px, <2 x i1> %y) {
+; CHECK-LABEL: @sext_to_sel_swap(
+; CHECK-NEXT:    [[X:%.*]] = mul <2 x i32> [[PX:%.*]], [[PX]]
+; CHECK-NEXT:    [[R:%.*]] = select <2 x i1> [[Y:%.*]], <2 x i32> <i32 -1, i32 -1>, <2 x i32> [[X]]
+; CHECK-NEXT:    ret <2 x i32> [[R]]
 ;
-  %sext = sext i1 %y to i32
-  %or = or i32 %x, %sext
-  ret i32 %or
+  %x = mul <2 x i32> %px, %px ; thwart complexity-based canonicalization
+  %sext = sext <2 x i1> %y to <2 x i32>
+  %r = or <2 x i32> %x, %sext
+  ret <2 x i32> %r
 }
 
-define i32 @orsext_to_sel_multi_use(i32 %x, i1 %y) {
-; CHECK-LABEL: @orsext_to_sel_multi_use(
+define i32 @sext_to_sel_multi_use(i32 %x, i1 %y) {
+; CHECK-LABEL: @sext_to_sel_multi_use(
 ; CHECK-NEXT:    [[SEXT:%.*]] = sext i1 [[Y:%.*]] to i32
-; CHECK-NEXT:    [[OR:%.*]] = or i32 [[SEXT]], [[X:%.*]]
-; CHECK-NEXT:    [[ADD:%.*]] = add i32 [[OR]], [[SEXT]]
-; CHECK-NEXT:    ret i32 [[ADD]]
+; CHECK-NEXT:    call void @use(i32 [[SEXT]])
+; CHECK-NEXT:    [[R:%.*]] = or i32 [[SEXT]], [[X:%.*]]
+; CHECK-NEXT:    ret i32 [[R]]
 ;
   %sext = sext i1 %y to i32
-  %or = or i32 %sext, %x
-  %add = add i32 %sext, %or
-  ret i32 %add
-}
-
-define <2 x i32> @orsext_to_sel_vec(<2 x i32> %x, <2 x i1> %y) {
-; CHECK-LABEL: @orsext_to_sel_vec(
-; CHECK-NEXT:    [[OR:%.*]] = select <2 x i1> [[Y:%.*]], <2 x i32> <i32 -1, i32 -1>, <2 x i32> [[X:%.*]]
-; CHECK-NEXT:    ret <2 x i32> [[OR]]
-;
-  %sext = sext <2 x i1> %y to <2 x i32>
-  %or = or <2 x i32> %sext, %x
-  ret <2 x i32> %or
+  call void @use(i32 %sext)
+  %r = or i32 %sext, %x
+  ret i32 %r
 }
 
-define <2 x i132> @orsext_to_sel_vec_swap(<2 x i132> %x, <2 x i1> %y) {
-; CHECK-LABEL: @orsext_to_sel_vec_swap(
-; CHECK-NEXT:    [[OR:%.*]] = select <2 x i1> [[Y:%.*]], <2 x i132> <i132 -1, i132 -1>, <2 x i132> [[X:%.*]]
-; CHECK-NEXT:    ret <2 x i132> [[OR]]
+define i32 @sext_to_sel_multi_use_constant_mask(i1 %y) {
+; CHECK-LABEL: @sext_to_sel_multi_use_constant_mask(
+; CHECK-NEXT:    [[SEXT:%.*]] = sext i1 [[Y:%.*]] to i32
+; CHECK-NEXT:    call void @use(i32 [[SEXT]])
+; CHECK-NEXT:    [[R:%.*]] = or i32 [[SEXT]], 42
+; CHECK-NEXT:    ret i32 [[R]]
 ;
-  %sext = sext <2 x i1> %y to <2 x i132>
-  %or = or <2 x i132> %x, %sext
-  ret <2 x i132> %or
+  %sext = sext i1 %y to i32
+  call void @use(i32 %sext)
+  %r = or i32 %sext, 42
+  ret i32 %r
 }
 
 ; (~A & B) | A --> A | B