[PATCH] D113801: [PowerPC][NFC] Add a series of codegen tests for vector reductions.
Stefan Pintilie via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Nov 19 12:08:35 PST 2021
stefanp updated this revision to Diff 388592.
stefanp added a comment.
Added the option -mattr=-paired-vector-memops to some of the P10 <https://reviews.llvm.org/P10> tests to keep
the instructions consistent without the paired vector memory operations.
The run lines were getting long so I split them up over multiple lines.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D113801/new/
https://reviews.llvm.org/D113801
Files:
llvm/test/CodeGen/PowerPC/vector-reduce-add.ll
llvm/test/CodeGen/PowerPC/vector-reduce-and.ll
llvm/test/CodeGen/PowerPC/vector-reduce-fadd.ll
llvm/test/CodeGen/PowerPC/vector-reduce-fmax.ll
llvm/test/CodeGen/PowerPC/vector-reduce-fmin.ll
llvm/test/CodeGen/PowerPC/vector-reduce-fmul.ll
llvm/test/CodeGen/PowerPC/vector-reduce-mul.ll
llvm/test/CodeGen/PowerPC/vector-reduce-or.ll
llvm/test/CodeGen/PowerPC/vector-reduce-smax.ll
llvm/test/CodeGen/PowerPC/vector-reduce-smin.ll
llvm/test/CodeGen/PowerPC/vector-reduce-umax.ll
llvm/test/CodeGen/PowerPC/vector-reduce-umin.ll
llvm/test/CodeGen/PowerPC/vector-reduce-xor.ll
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