[llvm] 4b3518d - [RISCV] Pre-commit test for D98932. NFC
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Fri Nov 19 08:40:21 PST 2021
Author: Craig Topper
Date: 2021-11-19T08:32:58-08:00
New Revision: 4b3518d50b30c4afb1f6e3500a4b26e0bb056a46
URL: https://github.com/llvm/llvm-project/commit/4b3518d50b30c4afb1f6e3500a4b26e0bb056a46
DIFF: https://github.com/llvm/llvm-project/commit/4b3518d50b30c4afb1f6e3500a4b26e0bb056a46.diff
LOG: [RISCV] Pre-commit test for D98932. NFC
Added:
llvm/test/CodeGen/RISCV/sink-icmp.ll
Modified:
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/RISCV/sink-icmp.ll b/llvm/test/CodeGen/RISCV/sink-icmp.ll
new file mode 100644
index 0000000000000..409545c1c88b3
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/sink-icmp.ll
@@ -0,0 +1,47 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=riscv32 -verify-machineinstrs < %s \
+; RUN: | FileCheck -check-prefixes=RV32 %s
+; RUN: llc -mtriple=riscv64 -verify-machineinstrs < %s \
+; RUN: | FileCheck -check-prefixes=RV64 %s
+
+define signext i16 @func(i16* %a, i16* %b) {
+; RV32-LABEL: func:
+; RV32: # %bb.0: # %entry
+; RV32-NEXT: lh a0, 0(a0)
+; RV32-NEXT: bltz a0, .LBB0_3
+; RV32-NEXT: # %bb.1: # %.LBB0_1
+; RV32-NEXT: seqz a1, a1
+; RV32-NEXT: bnez a1, .LBB0_3
+; RV32-NEXT: # %bb.2: # %.LBB0_2
+; RV32-NEXT: ret
+; RV32-NEXT: .LBB0_3: # %return
+; RV32-NEXT: mv a0, zero
+; RV32-NEXT: ret
+;
+; RV64-LABEL: func:
+; RV64: # %bb.0: # %entry
+; RV64-NEXT: lh a0, 0(a0)
+; RV64-NEXT: bltz a0, .LBB0_3
+; RV64-NEXT: # %bb.1: # %.LBB0_1
+; RV64-NEXT: seqz a1, a1
+; RV64-NEXT: bnez a1, .LBB0_3
+; RV64-NEXT: # %bb.2: # %.LBB0_2
+; RV64-NEXT: ret
+; RV64-NEXT: .LBB0_3: # %return
+; RV64-NEXT: mv a0, zero
+; RV64-NEXT: ret
+entry:
+ %0 = load i16, i16* %a
+ %cmp = icmp sgt i16 %0, -1
+ %tobool.not = icmp eq i16* %b, null
+ br i1 %cmp, label %.LBB0_1, label %return
+
+.LBB0_1:
+ br i1 %tobool.not, label %return, label %.LBB0_2
+
+.LBB0_2:
+ ret i16 %0
+
+return:
+ ret i16 0
+}
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