[llvm] 86e77cd - [PowerPC] Add a flag for conditional trap optimization

[Victor Huang via llvm-commits]

Author: Victor Huang
Date: 2021-11-19T10:24:54-06:00
New Revision: 86e77cdb081ff40b8b46099c935f8d343e26425e

URL: https://github.com/llvm/llvm-project/commit/86e77cdb081ff40b8b46099c935f8d343e26425e
DIFF: https://github.com/llvm/llvm-project/commit/86e77cdb081ff40b8b46099c935f8d343e26425e.diff

LOG: [PowerPC] Add a flag for conditional trap optimization

This patch adds a flag to enable/disable conditional trap optimization.
Optimization disabled by default.

Peer reviewed by: nemanjai

Added: 
    

Modified: 
    llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
    llvm/test/CodeGen/PowerPC/mi-peepholes-trap-opt.mir

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp b/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
index 797e322de7e8c..d12a9b806fd03 100644
--- a/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
+++ b/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
@@ -79,6 +79,11 @@ static cl::opt<bool>
                           cl::desc("enable elimination of zero-extensions"),
                           cl::init(false), cl::Hidden);
 
+static cl::opt<bool>
+    EnableTrapOptimization("ppc-opt-conditional-trap",
+                           cl::desc("enable optimization of conditional traps"),
+                           cl::init(false), cl::Hidden);
+
 namespace {
 
 struct PPCMIPeephole : public MachineFunctionPass {
@@ -423,7 +428,7 @@ bool PPCMIPeephole::simplifyCode(void) {
       // If a conditional trap instruction got optimized to an
       // unconditional trap, eliminate all the instructions after
       // the trap.
-      if (TrapOpt) {
+      if (EnableTrapOptimization && TrapOpt) {
         ToErase = &MI;
         continue;
       }
@@ -1020,6 +1025,7 @@ bool PPCMIPeephole::simplifyCode(void) {
       case PPC::TWI:
       case PPC::TD:
       case PPC::TW: {
+        if (!EnableTrapOptimization) break;
         MachineInstr *LiMI1 = getVRegDefOrNull(&MI.getOperand(1), MRI);
         MachineInstr *LiMI2 = getVRegDefOrNull(&MI.getOperand(2), MRI);
         bool IsOperand2Immediate = MI.getOperand(2).isImm();
@@ -1068,7 +1074,8 @@ bool PPCMIPeephole::simplifyCode(void) {
       ToErase = nullptr;
     }
     // Reset TrapOpt to false at the end of the basic block.
-    TrapOpt = false;
+    if (EnableTrapOptimization)
+      TrapOpt = false;
   }
 
   // Eliminate all the TOC save instructions which are redundant.

diff  --git a/llvm/test/CodeGen/PowerPC/mi-peepholes-trap-opt.mir b/llvm/test/CodeGen/PowerPC/mi-peepholes-trap-opt.mir
index 07bac3a2be0c1..3ce22ff5108bf 100644
--- a/llvm/test/CodeGen/PowerPC/mi-peepholes-trap-opt.mir
+++ b/llvm/test/CodeGen/PowerPC/mi-peepholes-trap-opt.mir
@@ -1,5 +1,6 @@
 # RUN: llc -mtriple powerpc64le-unknown-linux-gnu -mcpu=pwr8 -x mir < %s \
-# RUN:   -verify-machineinstrs -start-before=ppc-mi-peepholes | FileCheck %s
+# RUN:   -verify-machineinstrs -start-before=ppc-mi-peepholes \
+# RUN:   -ppc-opt-conditional-trap | FileCheck %s
 
 ---
 name:            conditional_trap_opt_reg_implicit_def