[PATCH] D113475: [llvm-tblgen][RISCV] Make llvm-tblgen RISCVCompressInstEmitter to be common infra across different targets

[Zixuan Wu via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG24d1673c8b9b: [llvm-tblgen][RISCV] Make llvm-tblgen RISCVCompressInstEmitter to be common… (authored by zixuan-wu).

Changed prior to commit:
  https://reviews.llvm.org/D113475?vs=386714&id=388089#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D113475/new/

https://reviews.llvm.org/D113475

Files:
  llvm/include/llvm/Target/Target.td
  llvm/lib/Target/RISCV/RISCVInstrInfoC.td
  llvm/test/TableGen/AsmPredicateCombiningRISCV.td
  llvm/utils/TableGen/CMakeLists.txt
  llvm/utils/TableGen/CompressInstEmitter.cpp
  llvm/utils/TableGen/RISCVCompressInstEmitter.cpp

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