[PATCH] D114076: [AMDGPU] Update GFX10 memory model to account for MALL
Carl Ritson via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Nov 17 04:12:47 PST 2021
critson created this revision.
critson added reviewers: t-tye, foad, rampitec.
Herald added subscribers: kerbowa, tpr, dstuttard, yaxunl, nhaehnle, jvesely, kzhuravl.
critson requested review of this revision.
Herald added subscribers: llvm-commits, wdng.
Herald added a project: LLVM.
Document memory attached last level (MALL) cache added in GFX10.3.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D114076
Files:
llvm/docs/AMDGPUUsage.rst
Index: llvm/docs/AMDGPUUsage.rst
===================================================================
--- llvm/docs/AMDGPUUsage.rst
+++ llvm/docs/AMDGPUUsage.rst
@@ -373,7 +373,7 @@
- Ryzen 3 Pro 4350G
- Ryzen 3 Pro 4350GE
- **GCN GFX10 (RDNA 1)** [AMD-GCN-GFX10-RDNA1]_
+ **GCN GFX10.1 (RDNA 1)** [AMD-GCN-GFX10-RDNA1]_
-----------------------------------------------------------------------------------------------------------------------
``gfx1010`` ``amdgcn`` dGPU - cumode - Absolute - *rocm-amdhsa* - Radeon RX 5700
- wavefrontsize64 flat - *pal-amdhsa* - Radeon RX 5700 XT
@@ -393,7 +393,7 @@
Add product
names.
- **GCN GFX10 (RDNA 2)** [AMD-GCN-GFX10-RDNA2]_
+ **GCN GFX10.3 (RDNA 2)** [AMD-GCN-GFX10-RDNA2]_
-----------------------------------------------------------------------------------------------------------------------
``gfx1030`` ``amdgcn`` dGPU - cumode - Absolute - *rocm-amdhsa* - Radeon RX 6800
- wavefrontsize64 flat - *pal-amdhsa* - Radeon RX 6800 XT
@@ -8571,6 +8571,9 @@
requirements of acquire, release and sequential consistency.
* The L2 cache can be kept coherent with other agents on some targets, or ranges
of virtual addresses can be set up to bypass it to ensure system coherence.
+* On GFX10.3 a memory attached last level (MALL) cache exists for GPU memory.
+ The MALL cache is fully coherent with GPU memory and has no impact on system
+ coherence. All agents (GPU and CPU) access GPU memory through the MALL cache.
Scalar memory operations are only used to access memory that is proven to not
change during the execution of the kernel dispatch. This includes constant
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