[PATCH] D114018: [SCEV] Canonicalize X - urem X, Y patterns

[Philip Reames via Phabricator via llvm-commits]

reames created this revision.
reames added reviewers: nikic, fhahn, mkazantsev, efriedma, lebedev.ri.
Herald added subscribers: dmgreen, javed.absar, zzheng, bollu, hiraditya, kristof.beyls, mcrosier.
reames requested review of this revision.
Herald added a project: LLVM.

There are multiple possible ways to represent the X - urem X, Y pattern.  SCEV was not canonicalizing, and thus, depending on which you analyzed, you could get different results.  The sub representation appears to produce strictly inferior results in practice, so I decided to canonicalize to the Y * X/Y version.

The motivation here is that runtime unroll produces the sub X - (and X, Y-1) pattern when Y is a power of two.  SCEV is thus unable to recognize that an unrolled loop exits because we don't figure out that the new unrolled step evenly divides the trip count of the unrolled loop.  After instcombine runs, we convert the the andn form which SCEV recognizes, so essentially, this is just fixing a nasty pass ordering dependency.

Why this appears to minorly negatively impact hardware loop recognition on ARM, I have no idea.  I definitely don't consider that a blocker.  I can't even tell from the test if this is actually a regression - the test is too poorly structured to be informative.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D114018

Files:
  llvm/lib/Analysis/ScalarEvolution.cpp
  llvm/test/Analysis/ScalarEvolution/urem-0.ll
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/fast-fp-loops.ll
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/mve-float-loops.ll
  llvm/test/CodeGen/Thumb2/LowOverheadLoops/mve-tail-data-types.ll
  llvm/test/Transforms/HardwareLoops/ARM/structure.ll
  llvm/test/Transforms/LoopUnroll/runtime-loop5.ll

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