[llvm] 0ecb12a - [STATEPOINT] Force implicit-def for lr register.
Serguei Katkov via llvm-commits
llvm-commits at lists.llvm.org
Mon Nov 15 21:52:21 PST 2021
Author: Serguei Katkov
Date: 2021-11-16T12:52:00+07:00
New Revision: 0ecb12a27ff63eca481cef5ed67ce654a8f111b4
URL: https://github.com/llvm/llvm-project/commit/0ecb12a27ff63eca481cef5ed67ce654a8f111b4
DIFF: https://github.com/llvm/llvm-project/commit/0ecb12a27ff63eca481cef5ed67ce654a8f111b4.diff
LOG: [STATEPOINT] Force implicit-def for lr register.
STATEPOINT instruction behavior is similar to call instruction.
In aarch64 BL instruction implicitly define lr register, so
STATEPOINT instruction should do the same.
However STATEPOINT is a general pseudo instruction and I could not find
a way to override list of implicit defs for specific target.
So this patch post processes inserting STATEPOINT instruction by
adding implisit dead def for lr.
Reviewers: reames, loicottet, ostannard
Reviewed By: reames
Subscribers: danilaml, hiraditya, kristof.beyls, llvm-commits, yrouban
Differential Revision: https://reviews.llvm.org/D111114
Added:
Modified:
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/test/CodeGen/AArch64/statepoint-call-lowering.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
index 4f9ea163fd76..7c7867f508ca 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -2286,9 +2286,15 @@ MachineBasicBlock *AArch64TargetLowering::EmitInstrWithCustomInserter(
case AArch64::F128CSEL:
return EmitF128CSEL(MI, BB);
+ case TargetOpcode::STATEPOINT:
+ // STATEPOINT is a pseudo instruction which has no implicit defs/uses
+ // while bl call instruction (where statepoint will be lowered at the end)
+ // has implicit def. Add this implicit dead def here as a workaround.
+ MI.addOperand(*MI.getMF(), MachineOperand::CreateReg(AArch64::LR, true,
+ true, false, true));
+ LLVM_FALLTHROUGH;
case TargetOpcode::STACKMAP:
case TargetOpcode::PATCHPOINT:
- case TargetOpcode::STATEPOINT:
return emitPatchPoint(MI, BB);
case AArch64::CATCHRET:
diff --git a/llvm/test/CodeGen/AArch64/statepoint-call-lowering.ll b/llvm/test/CodeGen/AArch64/statepoint-call-lowering.ll
index 02d9919b2164..65dc44618d5c 100644
--- a/llvm/test/CodeGen/AArch64/statepoint-call-lowering.ll
+++ b/llvm/test/CodeGen/AArch64/statepoint-call-lowering.ll
@@ -18,9 +18,13 @@ declare void @varargf(i32, ...)
define i1 @test_i1_return() gc "statepoint-example" {
; CHECK-LABEL: test_i1_return:
; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; CHECK-NEXT: .cfi_def_cfa_offset 16
+; CHECK-NEXT: .cfi_offset w30, -16
; CHECK-NEXT: bl return_i1
-; CHECK-NEXT: .Ltmp2:
+; CHECK-NEXT: .Ltmp0:
; CHECK-NEXT: and w0, w0, #0x1
+; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-NEXT: ret
; This is just checking that a i1 gets lowered normally when there's no extra
; state arguments to the statepoint
@@ -33,8 +37,12 @@ entry:
define i32 @test_i32_return() gc "statepoint-example" {
; CHECK-LABEL: test_i32_return:
; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; CHECK-NEXT: .cfi_def_cfa_offset 16
+; CHECK-NEXT: .cfi_offset w30, -16
; CHECK-NEXT: bl return_i32
-; CHECK-NEXT: .Ltmp3:
+; CHECK-NEXT: .Ltmp1:
+; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-NEXT: ret
entry:
%safepoint_token = tail call token (i64, i32, i32 ()*, i32, i32, ...) @llvm.experimental.gc.statepoint.p0f_i32f(i64 0, i32 0, i32 ()* @return_i32, i32 0, i32 0, i32 0, i32 0)
@@ -45,8 +53,12 @@ entry:
define i32* @test_i32ptr_return() gc "statepoint-example" {
; CHECK-LABEL: test_i32ptr_return:
; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; CHECK-NEXT: .cfi_def_cfa_offset 16
+; CHECK-NEXT: .cfi_offset w30, -16
; CHECK-NEXT: bl return_i32ptr
-; CHECK-NEXT: .Ltmp4:
+; CHECK-NEXT: .Ltmp2:
+; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-NEXT: ret
entry:
%safepoint_token = tail call token (i64, i32, i32* ()*, i32, i32, ...) @llvm.experimental.gc.statepoint.p0f_p0i32f(i64 0, i32 0, i32* ()* @return_i32ptr, i32 0, i32 0, i32 0, i32 0)
@@ -57,8 +69,12 @@ entry:
define float @test_float_return() gc "statepoint-example" {
; CHECK-LABEL: test_float_return:
; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; CHECK-NEXT: .cfi_def_cfa_offset 16
+; CHECK-NEXT: .cfi_offset w30, -16
; CHECK-NEXT: bl return_float
-; CHECK-NEXT: .Ltmp5:
+; CHECK-NEXT: .Ltmp3:
+; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-NEXT: ret
entry:
%safepoint_token = tail call token (i64, i32, float ()*, i32, i32, ...) @llvm.experimental.gc.statepoint.p0f_f32f(i64 0, i32 0, float ()* @return_float, i32 0, i32 0, i32 0, i32 0)
@@ -69,8 +85,12 @@ entry:
define %struct @test_struct_return() gc "statepoint-example" {
; CHECK-LABEL: test_struct_return:
; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; CHECK-NEXT: .cfi_def_cfa_offset 16
+; CHECK-NEXT: .cfi_offset w30, -16
; CHECK-NEXT: bl return_struct
-; CHECK-NEXT: .Ltmp6:
+; CHECK-NEXT: .Ltmp4:
+; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-NEXT: ret
entry:
%safepoint_token = tail call token (i64, i32, %struct ()*, i32, i32, ...) @llvm.experimental.gc.statepoint.p0f_structf(i64 0, i32 0, %struct ()* @return_struct, i32 0, i32 0, i32 0, i32 0)
@@ -81,13 +101,13 @@ entry:
define i1 @test_relocate(i32 addrspace(1)* %a) gc "statepoint-example" {
; CHECK-LABEL: test_relocate:
; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: sub sp, sp, #16
+; CHECK-NEXT: stp x30, x0, [sp, #-16]! // 8-byte Folded Spill
; CHECK-NEXT: .cfi_def_cfa_offset 16
-; CHECK-NEXT: str x0, [sp, #8]
+; CHECK-NEXT: .cfi_offset w30, -16
; CHECK-NEXT: bl return_i1
-; CHECK-NEXT: .Ltmp7:
+; CHECK-NEXT: .Ltmp5:
; CHECK-NEXT: and w0, w0, #0x1
-; CHECK-NEXT: add sp, sp, #16
+; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-NEXT: ret
; Check that an ununsed relocate has no code-generation impact
entry:
@@ -100,10 +120,14 @@ entry:
define void @test_void_vararg() gc "statepoint-example" {
; CHECK-LABEL: test_void_vararg:
; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; CHECK-NEXT: .cfi_def_cfa_offset 16
+; CHECK-NEXT: .cfi_offset w30, -16
; CHECK-NEXT: mov w0, #42
; CHECK-NEXT: mov w1, #43
; CHECK-NEXT: bl varargf
-; CHECK-NEXT: .Ltmp8:
+; CHECK-NEXT: .Ltmp6:
+; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-NEXT: ret
; Check a statepoint wrapping a *void* returning vararg function works
entry:
@@ -116,9 +140,13 @@ entry:
define i1 @test_i1_return_patchable() gc "statepoint-example" {
; CHECK-LABEL: test_i1_return_patchable:
; CHECK: // %bb.0: // %entry
+; CHECK-NEXT: str x30, [sp, #-16]! // 8-byte Folded Spill
+; CHECK-NEXT: .cfi_def_cfa_offset 16
+; CHECK-NEXT: .cfi_offset w30, -16
; CHECK-NEXT: nop
-; CHECK-NEXT: .Ltmp9:
+; CHECK-NEXT: .Ltmp7:
; CHECK-NEXT: and w0, w0, #0x1
+; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-NEXT: ret
; A patchable variant of test_i1_return
entry:
@@ -141,7 +169,7 @@ define i1 @test_cross_bb(i32 addrspace(1)* %a, i1 %external_cond) gc "statepoint
; CHECK-NEXT: mov w20, w1
; CHECK-NEXT: str x0, [sp, #8]
; CHECK-NEXT: bl return_i1
-; CHECK-NEXT: .Ltmp10:
+; CHECK-NEXT: .Ltmp8:
; CHECK-NEXT: tbz w20, #0, .LBB8_2
; CHECK-NEXT: // %bb.1: // %left
; CHECK-NEXT: mov w19, w0
@@ -176,18 +204,21 @@ declare void @consume_attributes(i32, i8* nest, i32, %struct2* byval(%struct2))
define void @test_attributes(%struct2* byval(%struct2) %s) gc "statepoint-example" {
; CHECK-LABEL: test_attributes:
; CHECK: // %bb.0: // %entry
-; CHECK-NEXT: sub sp, sp, #32
-; CHECK-NEXT: .cfi_def_cfa_offset 32
+; CHECK-NEXT: sub sp, sp, #48
+; CHECK-NEXT: str x30, [sp, #32] // 8-byte Folded Spill
+; CHECK-NEXT: .cfi_def_cfa_offset 48
+; CHECK-NEXT: .cfi_offset w30, -16
; CHECK-NEXT: mov x18, xzr
-; CHECK-NEXT: ldr q0, [sp, #32]
-; CHECK-NEXT: ldr x8, [sp, #48]
+; CHECK-NEXT: ldr q0, [sp, #48]
+; CHECK-NEXT: ldr x8, [sp, #64]
; CHECK-NEXT: mov w0, #42
; CHECK-NEXT: mov w1, #17
; CHECK-NEXT: str q0, [sp]
; CHECK-NEXT: str x8, [sp, #16]
; CHECK-NEXT: bl consume_attributes
-; CHECK-NEXT: .Ltmp11:
-; CHECK-NEXT: add sp, sp, #32
+; CHECK-NEXT: .Ltmp9:
+; CHECK-NEXT: ldr x30, [sp, #32] // 8-byte Folded Reload
+; CHECK-NEXT: add sp, sp, #48
; CHECK-NEXT: ret
entry:
; Check that arguments with attributes are lowered correctly.
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