[PATCH] D113937: [RISCV] Override TargetLowering::hasAndNot for Zbb.

Jessica Clarke via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Nov 15 18:14:26 PST 2021


jrtc27 added inline comments.


================
Comment at: llvm/test/CodeGen/RISCV/unfold-masked-merge-scalar-variablemask.ll:168
+; These tests should produce the same output as the corresponding out* test
+; when the Zbb extension is enabled.
 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
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craig.topper wrote:
> jrtc27 wrote:
> > Do we still want a TODO for non-Zbb out* to use the shorter sequence that in* use? Currently out* have an extra instruction (two for i64-on-RV32).
> I guess that's the RISCV equivalent of https://reviews.llvm.org/D112754
> 
> I can add a TODO
Looks rather familiar... which I guess means it should live in DAGCombine, not X86ISelLowering, though care is needed to avoid circular combines...


Repository:
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CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D113937/new/

https://reviews.llvm.org/D113937



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