[PATCH] D113937: [RISCV] Override TargetLowering::hasAndNot for Zbb.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/test/CodeGen/RISCV/unfold-masked-merge-scalar-variablemask.ll:1122
 ; RV32ZBB:       # %bb.0:
-; RV32ZBB-NEXT:    xori a0, a0, 42
+; RV32ZBB-NEXT:    addi a1, zero, 42
+; RV32ZBB-NEXT:    orn a1, a1, a2
----------------
This is a size regression, but the comment above it also says this isn't canonical form.


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Comment at: llvm/test/CodeGen/RISCV/unfold-masked-merge-scalar-variablemask.ll:1383
 ; RV32ZBB:       # %bb.0:
-; RV32ZBB-NEXT:    xori a0, a1, 42
-; RV32ZBB-NEXT:    andn a0, a0, a2
-; RV32ZBB-NEXT:    xor a0, a0, a1
+; RV32ZBB-NEXT:    and a0, a1, a2
+; RV32ZBB-NEXT:    addi a1, zero, 42
----------------
This also appears to be a size regression.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D113937/new/

https://reviews.llvm.org/D113937