[PATCH] D91077: [LoopVectorizer][SVE] Vectorize a simple loop with with a scalable VF.

[Sander de Smalen via Phabricator via llvm-commits]

sdesmalen added a comment.

In D91077#3129138 <https://reviews.llvm.org/D91077#3129138>, @Allen wrote:

> Please help to check whether to add the following code to support  the usage: -march=armv8-a+sve2**+use-scalar-inc-vl**

Hi @Allen, `+use-scalar-inc-vl` is already implied when specifying `+sve2`.

For `+sve`, we don't really intend for this to be a user-facing flag, but rather to have it enabled for a specific uarch if it is known to be beneficial, so that compiling for `-mcpu=<cpu>` will enable the merging of add/sub+cnt into inc/dec instructions automatically. This is similar to how the other tuning features are defined/used in LLVM. See for example `def TuneNeoverseN1` in `AArch64.td` that sets the tuning features for NeoverseN1, such as `FeatureFuseAES` to fuse AES crypto operations. These features are not supported by the `-march` flag, because they're not changing the set of supported architectural features, but are rather tuning features to hint the compiler which instructions are beneficial. `FeatureUseScalarIncVL` is no different in that respect. The way to enable this for a CPU is to add it as a tuning feature to a CPU in AArch64.td by defining some `def TuneSomeCPU : SubtargetFeature<..., [FeatureUseScalarIncVL]>`.

If you explicitly want to toggle this from the command-line in combination with `-march`, you can pass the command directly to the Clang compiler using `-Xclang -target-feature -Xclang +use-scalar-inc-vl`.


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