[PATCH] D113609: [X86][Costmodel] `getReplicationShuffleCost()`: promote 16 bit-wide elements to 32 bit when no AVX512BW

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added inline comments.


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Comment at: llvm/lib/Target/X86/X86TargetTransformInfo.cpp:3665
+      FixedVectorType::get(EffEltTy, NumReplicatedElements);
   auto *ReplicatedVecTy = FixedVectorType::get(EltTy, NumReplicatedElements);
 
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Could we avoid so much multi-line splill is we just renamed 'Replicated' to 'Dst'?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D113609/new/

https://reviews.llvm.org/D113609