[PATCH] D113843: [X86][Costmodel] `trunc v8i64 to v16i16/v32i16` can appear after legalization, cost is same as for `trunc v8i64 to v8i16`

Roman Lebedev via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Nov 14 07:42:15 PST 2021 

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGb2839610124b: [X86][Costmodel] `trunc v8i64 to v16i16/v32i16` can appear after legalization… (authored by lebedev.ri).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D113843/new/

https://reviews.llvm.org/D113843

Files:
  llvm/lib/Target/X86/X86TargetTransformInfo.cpp
  llvm/test/Analysis/CostModel/X86/trunc.ll


Index: llvm/test/Analysis/CostModel/X86/trunc.ll
===================================================================
--- llvm/test/Analysis/CostModel/X86/trunc.ll
+++ llvm/test/Analysis/CostModel/X86/trunc.ll
@@ -405,30 +405,30 @@
 ; AVX512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V6i64 = trunc <6 x i64> undef to <6 x i16>
 ; AVX512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V7i64 = trunc <7 x i64> undef to <7 x i16>
 ; AVX512-NEXT:  Cost Model: Found an estimated cost of 2 for instruction: %V8i64 = trunc <8 x i64> undef to <8 x i16>
-; AVX512-NEXT:  Cost Model: Found an estimated cost of 25 for instruction: %V10i64 = trunc <10 x i64> undef to <10 x i16>
-; AVX512-NEXT:  Cost Model: Found an estimated cost of 31 for instruction: %V12i64 = trunc <12 x i64> undef to <12 x i16>
-; AVX512-NEXT:  Cost Model: Found an estimated cost of 37 for instruction: %V14i64 = trunc <14 x i64> undef to <14 x i16>
-; AVX512-NEXT:  Cost Model: Found an estimated cost of 5 for instruction: %V16i64 = trunc <16 x i64> undef to <16 x i16>
-; AVX512-NEXT:  Cost Model: Found an estimated cost of 56 for instruction: %V20i64 = trunc <20 x i64> undef to <20 x i16>
-; AVX512-NEXT:  Cost Model: Found an estimated cost of 67 for instruction: %V24i64 = trunc <24 x i64> undef to <24 x i16>
-; AVX512-NEXT:  Cost Model: Found an estimated cost of 81 for instruction: %V28i64 = trunc <28 x i64> undef to <28 x i16>
-; AVX512-NEXT:  Cost Model: Found an estimated cost of 11 for instruction: %V32i64 = trunc <32 x i64> undef to <32 x i16>
-; AVX512-NEXT:  Cost Model: Found an estimated cost of 109 for instruction: %V40i64 = trunc <40 x i64> undef to <40 x i16>
-; AVX512-NEXT:  Cost Model: Found an estimated cost of 134 for instruction: %V48i64 = trunc <48 x i64> undef to <48 x i16>
-; AVX512-NEXT:  Cost Model: Found an estimated cost of 159 for instruction: %V56i64 = trunc <56 x i64> undef to <56 x i16>
-; AVX512-NEXT:  Cost Model: Found an estimated cost of 22 for instruction: %V64i64 = trunc <64 x i64> undef to <64 x i16>
-; AVX512-NEXT:  Cost Model: Found an estimated cost of 226 for instruction: %V80i64 = trunc <80 x i64> undef to <80 x i16>
-; AVX512-NEXT:  Cost Model: Found an estimated cost of 276 for instruction: %V96i64 = trunc <96 x i64> undef to <96 x i16>
-; AVX512-NEXT:  Cost Model: Found an estimated cost of 318 for instruction: %V112i64 = trunc <112 x i64> undef to <112 x i16>
-; AVX512-NEXT:  Cost Model: Found an estimated cost of 44 for instruction: %V128i64 = trunc <128 x i64> undef to <128 x i16>
-; AVX512-NEXT:  Cost Model: Found an estimated cost of 460 for instruction: %V160i64 = trunc <160 x i64> undef to <160 x i16>
-; AVX512-NEXT:  Cost Model: Found an estimated cost of 552 for instruction: %V192i64 = trunc <192 x i64> undef to <192 x i16>
-; AVX512-NEXT:  Cost Model: Found an estimated cost of 644 for instruction: %V224i64 = trunc <224 x i64> undef to <224 x i16>
-; AVX512-NEXT:  Cost Model: Found an estimated cost of 88 for instruction: %V256i64 = trunc <256 x i64> undef to <256 x i16>
-; AVX512-NEXT:  Cost Model: Found an estimated cost of 920 for instruction: %V320i64 = trunc <320 x i64> undef to <320 x i16>
-; AVX512-NEXT:  Cost Model: Found an estimated cost of 1104 for instruction: %V384i64 = trunc <384 x i64> undef to <384 x i16>
-; AVX512-NEXT:  Cost Model: Found an estimated cost of 1288 for instruction: %V448i64 = trunc <448 x i64> undef to <448 x i16>
-; AVX512-NEXT:  Cost Model: Found an estimated cost of 176 for instruction: %V512i64 = trunc <512 x i64> undef to <512 x i16>
+; AVX512-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V10i64 = trunc <10 x i64> undef to <10 x i16>
+; AVX512-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V12i64 = trunc <12 x i64> undef to <12 x i16>
+; AVX512-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V14i64 = trunc <14 x i64> undef to <14 x i16>
+; AVX512-NEXT:  Cost Model: Found an estimated cost of 4 for instruction: %V16i64 = trunc <16 x i64> undef to <16 x i16>
+; AVX512-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V20i64 = trunc <20 x i64> undef to <20 x i16>
+; AVX512-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V24i64 = trunc <24 x i64> undef to <24 x i16>
+; AVX512-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V28i64 = trunc <28 x i64> undef to <28 x i16>
+; AVX512-NEXT:  Cost Model: Found an estimated cost of 8 for instruction: %V32i64 = trunc <32 x i64> undef to <32 x i16>
+; AVX512-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V40i64 = trunc <40 x i64> undef to <40 x i16>
+; AVX512-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V48i64 = trunc <48 x i64> undef to <48 x i16>
+; AVX512-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V56i64 = trunc <56 x i64> undef to <56 x i16>
+; AVX512-NEXT:  Cost Model: Found an estimated cost of 16 for instruction: %V64i64 = trunc <64 x i64> undef to <64 x i16>
+; AVX512-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V80i64 = trunc <80 x i64> undef to <80 x i16>
+; AVX512-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V96i64 = trunc <96 x i64> undef to <96 x i16>
+; AVX512-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V112i64 = trunc <112 x i64> undef to <112 x i16>
+; AVX512-NEXT:  Cost Model: Found an estimated cost of 32 for instruction: %V128i64 = trunc <128 x i64> undef to <128 x i16>
+; AVX512-NEXT:  Cost Model: Found an estimated cost of 64 for instruction: %V160i64 = trunc <160 x i64> undef to <160 x i16>
+; AVX512-NEXT:  Cost Model: Found an estimated cost of 64 for instruction: %V192i64 = trunc <192 x i64> undef to <192 x i16>
+; AVX512-NEXT:  Cost Model: Found an estimated cost of 64 for instruction: %V224i64 = trunc <224 x i64> undef to <224 x i16>
+; AVX512-NEXT:  Cost Model: Found an estimated cost of 64 for instruction: %V256i64 = trunc <256 x i64> undef to <256 x i16>
+; AVX512-NEXT:  Cost Model: Found an estimated cost of 128 for instruction: %V320i64 = trunc <320 x i64> undef to <320 x i16>
+; AVX512-NEXT:  Cost Model: Found an estimated cost of 128 for instruction: %V384i64 = trunc <384 x i64> undef to <384 x i16>
+; AVX512-NEXT:  Cost Model: Found an estimated cost of 128 for instruction: %V448i64 = trunc <448 x i64> undef to <448 x i16>
+; AVX512-NEXT:  Cost Model: Found an estimated cost of 128 for instruction: %V512i64 = trunc <512 x i64> undef to <512 x i16>
 ; AVX512-NEXT:  Cost Model: Found an estimated cost of 0 for instruction: %i32 = trunc i32 undef to i16
 ; AVX512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = trunc <2 x i32> undef to <2 x i16>
 ; AVX512-NEXT:  Cost Model: Found an estimated cost of 1 for instruction: %V3i32 = trunc <3 x i32> undef to <3 x i16>
Index: llvm/lib/Target/X86/X86TargetTransformInfo.cpp
===================================================================
--- llvm/lib/Target/X86/X86TargetTransformInfo.cpp
+++ llvm/lib/Target/X86/X86TargetTransformInfo.cpp
@@ -1673,6 +1673,8 @@
     { ISD::TRUNCATE,  MVT::v2i16,   MVT::v2i64,  1 }, // vpshufb
     { ISD::TRUNCATE,  MVT::v8i8,    MVT::v8i64,  2 }, // vpmovqb
     { ISD::TRUNCATE,  MVT::v8i16,   MVT::v8i64,  2 }, // vpmovqw
+    { ISD::TRUNCATE,  MVT::v16i16,  MVT::v8i64,  2 }, // vpmovqw
+    { ISD::TRUNCATE,  MVT::v32i16,  MVT::v8i64,  2 }, // vpmovqw
     { ISD::TRUNCATE,  MVT::v8i32,   MVT::v8i64,  1 }, // vpmovqd
     { ISD::TRUNCATE,  MVT::v4i32,   MVT::v4i64,  1 }, // zmm vpmovqd
     { ISD::TRUNCATE,  MVT::v16i8,   MVT::v16i64, 5 },// 2*vpmovqd+concat+vpmovdb


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