[PATCH] D113827: [X86] Widen 128/256-bit VPTERNLOG patterns to 512-bit on non-VLX targets
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Nov 14 05:41:15 PST 2021
This revision was automatically updated to reflect the committed changes.
Closed by commit rGf4143ffed76e: [X86] Widen 128/256-bit VPTERNLOG patterns to 512-bit on non-VLX targets (authored by RKSimon).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D113827/new/
https://reviews.llvm.org/D113827
Files:
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/combine-bitselect.ll
llvm/test/CodeGen/X86/vector-fshl-128.ll
llvm/test/CodeGen/X86/vector-fshl-256.ll
llvm/test/CodeGen/X86/vector-fshl-rot-128.ll
llvm/test/CodeGen/X86/vector-fshl-rot-256.ll
llvm/test/CodeGen/X86/vector-fshr-128.ll
llvm/test/CodeGen/X86/vector-fshr-256.ll
llvm/test/CodeGen/X86/vector-fshr-rot-128.ll
llvm/test/CodeGen/X86/vector-fshr-rot-256.ll
llvm/test/CodeGen/X86/vector-rotate-128.ll
llvm/test/CodeGen/X86/vector-rotate-256.ll
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