[PATCH] D113827: [X86] Widen 128/256-bit VPTERNLOG patterns to 512-bit on non-VLX targets

Simon Pilgrim via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Nov 14 04:55:41 PST 2021


RKSimon added inline comments.


================
Comment at: llvm/test/CodeGen/X86/combine-bitselect.ll:35-40
+; AVX512F-NEXT:    # kill: def $xmm1 killed $xmm1 def $zmm1
+; AVX512F-NEXT:    # kill: def $xmm0 killed $xmm0 def $zmm0
+; AVX512F-NEXT:    vmovdqa {{.*#+}} xmm2 = [18446744069414584319,18446744060824649725]
+; AVX512F-NEXT:    vpternlogq $216, %zmm2, %zmm1, %zmm0
+; AVX512F-NEXT:    # kill: def $xmm0 killed $xmm0 killed $zmm0
+; AVX512F-NEXT:    vzeroupper
----------------
pengfei wrote:
> I wonder if the left side code wins sometime, e.g. optsize?
We've replaced 2 x 128-bit (folded) loads with 1 x 128-bit (unfolded) load.

The issue I was most concerned with is increased register pressure - this is what the broadcast code helps with, but even that is of low concern.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D113827/new/

https://reviews.llvm.org/D113827



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