[PATCH] D113827: [X86] Widen 128/256-bit VPTERNLOG patterns to 512-bit on non-VLX targets

[Phoebe Wang via Phabricator via llvm-commits]

pengfei added inline comments.


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Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:46266-46269
+    // VPTERNLOG is only available as vXi32/64-bit types.
+    MVT OpSVT = EltSizeInBits == 32 ? MVT::i32 : MVT::i64;
+    MVT OpVT =
+        MVT::getVectorVT(OpSVT, VT.getSizeInBits() / OpSVT.getSizeInBits());
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RKSimon wrote:
> pengfei wrote:
> > Why do we need to do it? Do we have new `VT` type other than `i32/i64` now? Or the previous code can handle them already?
> This is to ensure we are using types that getAVX512Node can recognise as potential broadcasts. We currently generate VPTERNLOG nodes with any integer type (not just vXi32/i64) and isel handles it later on,
> 
> Would it make sense to remove the new broadcast code from getAVX512Node for this patch and I propose it as a separate patch? It'd mean that we end up with unfolded 128/256-bit loads for the widened cases in this patch, but wouldn't be an actual regression.
Yeah, makes sense.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D113827/new/

https://reviews.llvm.org/D113827