[PATCH] D113777: [Analysis] Ensure getTypeLegalizationCost returns a simple VT for TypeScalarizeScalableVector
David Sherwood via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Nov 12 08:32:02 PST 2021
david-arm created this revision.
david-arm added reviewers: sdesmalen, kmclaughlin, efriedma.
Herald added subscribers: ctetreau, hiraditya, kristof.beyls.
david-arm requested review of this revision.
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When getTypeConversion returns TypeScalarizeScalableVector we were
sometimes returning a non-simple type from getTypeLegalizationCost.
However, many callers depend upon this being a simple type and will
crash if not. This patch changes getTypeLegalizationCost to ensure
that we always a return sensible simple VT. If the vector type
contains unusual integer types, e.g. <vscale x 2 x i3>, then we just
set the type to MVT::i64 as a reasonable default.
A test has been added here that demonstrates the vectoriser can
correctly calculate the cost of vectorising a "zext i3 to i64"
instruction with a VF=vscale x 1:
Transforms/LoopVectorize/AArch64/sve-inductions-unusual-types.ll
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D113777
Files:
llvm/lib/CodeGen/TargetLoweringBase.cpp
llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions-unusual-types.ll
Index: llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions-unusual-types.ll
===================================================================
--- llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions-unusual-types.ll
+++ llvm/test/Transforms/LoopVectorize/AArch64/sve-inductions-unusual-types.ll
@@ -48,4 +48,50 @@
ret void
}
+
+; DEBUG: Found an estimated cost of Invalid for VF vscale x 1 For instruction: %indvars.iv1294 = phi i3 [ %indvars.iv.next1295, %for.body ], [ 0, %entry ]
+; DEBUG: Found an estimated cost of Invalid for VF vscale x 1 For instruction: %zexti3 = zext i3 %indvars.iv1294 to i64
+; DEBUG: Found an estimated cost of Invalid for VF vscale x 1 For instruction: %indvars.iv.next1295 = add i3 %indvars.iv1294, 1
+
+define void @induction_i3_zext(i64* %dst) #0 {
+; CHECK-LABEL: @induction_i3_zext(
+; CHECK: vector.ph:
+; CHECK: [[TMP4:%.*]] = call <vscale x 2 x i8> @llvm.experimental.stepvector.nxv2i8()
+; CHECK: [[TMP5:%.*]] = trunc <vscale x 2 x i8> %4 to <vscale x 2 x i3>
+; CHECK-NEXT: [[TMP6:%.*]] = add <vscale x 2 x i3> [[TMP5]], zeroinitializer
+; CHECK-NEXT: [[TMP7:%.*]] = mul <vscale x 2 x i3> [[TMP6]], shufflevector (<vscale x 2 x i3> insertelement (<vscale x 2 x i3> poison, i3 1, i32 0), <vscale x 2 x i3> poison, <vscale x 2 x i32> zeroinitializer)
+; CHECK-NEXT: [[INDUCTION:%.*]] = add <vscale x 2 x i3> zeroinitializer, [[TMP7]]
+; CHECK: vector.body:
+; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %vector.ph ], [ [[INDEX_NEXT:%.*]], %vector.body ]
+; CHECK-NEXT: [[VEC_IND:%.*]] = phi <vscale x 2 x i3> [ [[INDUCTION]], %vector.ph ], [ [[VEC_IND_NEXT:%.*]], %vector.body ]
+; CHECK-NEXT: [[TMP9:%.*]] = add i64 [[INDEX]], 0
+; CHECK-NEXT: [[TMP10:%.*]] = zext <vscale x 2 x i3> [[VEC_IND]] to <vscale x 2 x i64>
+; CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds i64, i64* [[DST:%.*]], i64 [[TMP9]]
+; CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds i64, i64* [[TMP12]], i32 0
+; CHECK-NEXT: [[TMP14:%.*]] = bitcast i64* [[TMP13]] to <vscale x 2 x i64>*
+; CHECK-NEXT: store <vscale x 2 x i64> [[TMP10]], <vscale x 2 x i64>* [[TMP14]], align 8
+; CHECK-NEXT: [[TMP15:%.*]] = call i64 @llvm.vscale.i64()
+; CHECK-NEXT: [[TMP16:%.*]] = mul i64 [[TMP15]], 2
+; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP16]]
+; CHECK-NEXT: [[VEC_IND_NEXT]] = add <vscale x 2 x i3> [[VEC_IND]],
+;
+entry:
+ br label %for.body
+
+for.body: ; preds = %for.body, %entry
+ %indvars.iv1294 = phi i3 [ %indvars.iv.next1295, %for.body ], [ 0, %entry ]
+ %indvars.iv1286 = phi i64 [ %indvars.iv.next1287, %for.body ], [ 0, %entry ]
+ %zexti3 = zext i3 %indvars.iv1294 to i64
+ %arrayidx = getelementptr inbounds i64, i64* %dst, i64 %indvars.iv1286
+ store i64 %zexti3, i64* %arrayidx, align 8
+ %indvars.iv.next1287 = add nuw nsw i64 %indvars.iv1286, 1
+ %indvars.iv.next1295 = add i3 %indvars.iv1294, 1
+ %exitcond = icmp eq i64 %indvars.iv.next1287, 64
+ br i1 %exitcond, label %for.end, label %for.body
+
+for.end: ; preds = %for.body
+ ret void
+}
+
+
attributes #0 = {"target-features"="+sve"}
Index: llvm/lib/CodeGen/TargetLoweringBase.cpp
===================================================================
--- llvm/lib/CodeGen/TargetLoweringBase.cpp
+++ llvm/lib/CodeGen/TargetLoweringBase.cpp
@@ -1856,8 +1856,12 @@
while (true) {
LegalizeKind LK = getTypeConversion(C, MTy);
- if (LK.first == TypeScalarizeScalableVector)
- return std::make_pair(InstructionCost::getInvalid(), MVT::getVT(Ty));
+ if (LK.first == TypeScalarizeScalableVector) {
+ // Ensure we return a sensible simple VT here, since many callers of this
+ // function require it.
+ MVT VT = MTy.isSimple() ? MTy.getSimpleVT() : MVT::i64;
+ return std::make_pair(InstructionCost::getInvalid(), VT);
+ }
if (LK.first == TypeLegal)
return std::make_pair(Cost, MTy.getSimpleVT());
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