[llvm] 2ca45ad - [CodeGen, Target] Use MachineRegisterInfo::use_operands (NFC)
Kazu Hirata via llvm-commits
llvm-commits at lists.llvm.org
Thu Nov 11 22:29:05 PST 2021
Author: Kazu Hirata
Date: 2021-11-11T22:28:55-08:00
New Revision: 2ca45adf24d8ede45b9f600d13a4b4f7005e13af
URL: https://github.com/llvm/llvm-project/commit/2ca45adf24d8ede45b9f600d13a4b4f7005e13af
DIFF: https://github.com/llvm/llvm-project/commit/2ca45adf24d8ede45b9f600d13a4b4f7005e13af.diff
LOG: [CodeGen, Target] Use MachineRegisterInfo::use_operands (NFC)
Added:
Modified:
llvm/lib/CodeGen/MIRCanonicalizerPass.cpp
llvm/lib/CodeGen/ModuloSchedule.cpp
llvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp
llvm/lib/Target/ARM/A15SDOptimizer.cpp
llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp
llvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp
Removed:
################################################################################
diff --git a/llvm/lib/CodeGen/MIRCanonicalizerPass.cpp b/llvm/lib/CodeGen/MIRCanonicalizerPass.cpp
index a1c492c8d33a8..3ec8c627f1313 100644
--- a/llvm/lib/CodeGen/MIRCanonicalizerPass.cpp
+++ b/llvm/lib/CodeGen/MIRCanonicalizerPass.cpp
@@ -328,8 +328,8 @@ static bool propagateLocalCopies(MachineBasicBlock *MBB) {
continue;
std::vector<MachineOperand *> Uses;
- for (auto UI = MRI.use_begin(Dst); UI != MRI.use_end(); ++UI)
- Uses.push_back(&*UI);
+ for (MachineOperand &MO : MRI.use_operands(Dst))
+ Uses.push_back(&MO);
for (auto *MO : Uses)
MO->setReg(Src);
diff --git a/llvm/lib/CodeGen/ModuloSchedule.cpp b/llvm/lib/CodeGen/ModuloSchedule.cpp
index f217723f8a4b9..8b3cdfab4d426 100644
--- a/llvm/lib/CodeGen/ModuloSchedule.cpp
+++ b/llvm/lib/CodeGen/ModuloSchedule.cpp
@@ -81,10 +81,7 @@ void ModuloScheduleExpander::expand() {
Register Reg = Op.getReg();
unsigned MaxDiff = 0;
bool PhiIsSwapped = false;
- for (MachineRegisterInfo::use_iterator UI = MRI.use_begin(Reg),
- EI = MRI.use_end();
- UI != EI; ++UI) {
- MachineOperand &UseOp = *UI;
+ for (MachineOperand &UseOp : MRI.use_operands(Reg)) {
MachineInstr *UseMI = UseOp.getParent();
int UseStage = Schedule.getStage(UseMI);
unsigned Diff = 0;
@@ -344,10 +341,8 @@ static void replaceRegUsesAfterLoop(unsigned FromReg, unsigned ToReg,
/// specified loop.
static bool hasUseAfterLoop(unsigned Reg, MachineBasicBlock *BB,
MachineRegisterInfo &MRI) {
- for (MachineRegisterInfo::use_iterator I = MRI.use_begin(Reg),
- E = MRI.use_end();
- I != E; ++I)
- if (I->getParent()->getParent() != BB)
+ for (const MachineOperand &MO : MRI.use_operands(Reg))
+ if (MO.getParent()->getParent() != BB)
return true;
return false;
}
@@ -725,12 +720,10 @@ void ModuloScheduleExpander::removeDeadInstructions(MachineBasicBlock *KernelBB,
continue;
}
unsigned realUses = 0;
- for (MachineRegisterInfo::use_iterator UI = MRI.use_begin(reg),
- EI = MRI.use_end();
- UI != EI; ++UI) {
+ for (const MachineOperand &U : MRI.use_operands(reg)) {
// Check if there are any uses that occur only in the original
// loop. If so, that's not a real use.
- if (UI->getParent()->getParent() != BB) {
+ if (U.getParent()->getParent() != BB) {
realUses++;
used = true;
break;
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp b/llvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp
index 095249d6dd36f..5d4b007f11e68 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp
@@ -1577,11 +1577,9 @@ void AMDGPUMachineCFGStructurizer::replaceLiveOutRegs(
// Check if register is live out of the basic block
MachineBasicBlock *DefMBB = getDefInstr(Reg)->getParent();
- for (auto UI = MRI->use_begin(Reg), E = MRI->use_end(); UI != E; ++UI) {
- if ((*UI).getParent()->getParent() != DefMBB) {
+ for (const MachineOperand &MO : MRI->use_operands(Reg))
+ if (MO.getParent()->getParent() != DefMBB)
IsDead = false;
- }
- }
LLVM_DEBUG(dbgs() << "Register " << printReg(Reg, TRI) << " is "
<< (IsDead ? "dead" : "alive")
@@ -1848,9 +1846,8 @@ void AMDGPUMachineCFGStructurizer::ensureCondIsNotKilled(
return;
Register CondReg = Cond[0].getReg();
- for (auto UI = MRI->use_begin(CondReg), E = MRI->use_end(); UI != E; ++UI) {
- (*UI).setIsKill(false);
- }
+ for (MachineOperand &MO : MRI->use_operands(CondReg))
+ MO.setIsKill(false);
}
void AMDGPUMachineCFGStructurizer::rewriteCodeBBTerminator(MachineBasicBlock *CodeBB,
diff --git a/llvm/lib/Target/ARM/A15SDOptimizer.cpp b/llvm/lib/Target/ARM/A15SDOptimizer.cpp
index cbe98b93ca735..f4d0f4a6d6b00 100644
--- a/llvm/lib/Target/ARM/A15SDOptimizer.cpp
+++ b/llvm/lib/Target/ARM/A15SDOptimizer.cpp
@@ -620,9 +620,8 @@ bool A15SDOptimizer::runOnInstruction(MachineInstr *MI) {
// Collect all the uses of this MI's DPR def for updating later.
SmallVector<MachineOperand*, 8> Uses;
Register DPRDefReg = MI->getOperand(0).getReg();
- for (MachineRegisterInfo::use_iterator I = MRI->use_begin(DPRDefReg),
- E = MRI->use_end(); I != E; ++I)
- Uses.push_back(&*I);
+ for (MachineOperand &MO : MRI->use_operands(DPRDefReg))
+ Uses.push_back(&MO);
// We can optimize this.
unsigned NewReg = optimizeSDPattern(MI);
diff --git a/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp b/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp
index 81877e36491cf..2c5ad3b589d20 100644
--- a/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp
@@ -972,8 +972,8 @@ namespace {
} // end anonymous namespace
bool DeadCodeElimination::isDead(unsigned R) const {
- for (auto I = MRI.use_begin(R), E = MRI.use_end(); I != E; ++I) {
- MachineInstr *UseI = I->getParent();
+ for (const MachineOperand &MO : MRI.use_operands(R)) {
+ const MachineInstr *UseI = MO.getParent();
if (UseI->isDebugValue())
continue;
if (UseI->isPHI()) {
@@ -3120,8 +3120,8 @@ bool HexagonLoopRescheduling::processLoop(LoopCand &C) {
if (isConst(PR))
continue;
bool BadUse = false, GoodUse = false;
- for (auto UI = MRI->use_begin(PR), UE = MRI->use_end(); UI != UE; ++UI) {
- MachineInstr *UseI = UI->getParent();
+ for (const MachineOperand &MO : MRI->use_operands(PR)) {
+ const MachineInstr *UseI = MO.getParent();
if (UseI->getParent() != C.LB) {
BadUse = true;
break;
diff --git a/llvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp b/llvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp
index c3aa905598f10..9a3feb5b6af18 100644
--- a/llvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonEarlyIfConv.cpp
@@ -390,8 +390,8 @@ bool HexagonEarlyIfConversion::isValidCandidate(const MachineBasicBlock *B)
continue;
if (!isPredicate(R))
continue;
- for (auto U = MRI->use_begin(R); U != MRI->use_end(); ++U)
- if (U->getParent()->isPHI())
+ for (const MachineOperand &U : MRI->use_operands(R))
+ if (U.getParent()->isPHI())
return false;
}
}
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