[PATCH] D113661: [X86][FP16] Avoid to generate VZEXT_MOVL with i16

[Phoebe Wang via Phabricator via llvm-commits]

pengfei added a comment.

In D113661#3124238 <https://reviews.llvm.org/D113661#3124238>, @LuoYuanke wrote:

> Should we support VZEXT_MOVL for i16 with VMOVSHZrr just like what we support VZEXT_MOVL for i32?
>
>   diff --git a/llvm/lib/Target/X86/X86InstrAVX512.td b/llvm/lib/Target/X86/X86InstrAVX512.td
>   index 8aee96e1c504..4dca5490b26f 100644
>   --- a/llvm/lib/Target/X86/X86InstrAVX512.td
>   +++ b/llvm/lib/Target/X86/X86InstrAVX512.td
>   @@ -4659,6 +4659,8 @@ let Predicates = [HasAVX512] in {
>    let Predicates = [HasFP16] in {
>      def : Pat<(v8f16 (X86vzmovl (v8f16 VR128X:$src))),
>                (VMOVSHZrr (v8f16 (AVX512_128_SET0)), VR128X:$src)>;
>   +  def : Pat<(v8i16 (X86vzmovl (v8i16 VR128X:$src))),
>   +            (VMOVSHZrr (v8i16 (AVX512_128_SET0)), VR128X:$src)>;
>   
>      // FIXME we need better canonicalization in dag combine
>      def : Pat<(v16f16 (X86vzmovl (v16f16 VR256X:$src))),

I think it's OK for now since we only have these 2 cases for i16 that may create a `VZEXT_MOVL` node. If we adding pattern, we also need to duplicate for `v16i16` and `v32i16`.


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https://reviews.llvm.org/D113661