[llvm] bc39ce9 - [NFC] Remove unnecessary check prefix of AIX test

[Qiu Chaofan via llvm-commits]

Author: Qiu Chaofan
Date: 2021-11-11T13:27:42+08:00
New Revision: bc39ce9fa5e7dadb26e3ca545a846abee65e3c45

URL: https://github.com/llvm/llvm-project/commit/bc39ce9fa5e7dadb26e3ca545a846abee65e3c45
DIFF: https://github.com/llvm/llvm-project/commit/bc39ce9fa5e7dadb26e3ca545a846abee65e3c45.diff

LOG: [NFC] Remove unnecessary check prefix of AIX test

9e9b0f4 introduced support for asm-full-reg-names on AIX. Now we can
merge the test check prefix.

Added: 
    

Modified: 
    llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync-64.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync-64.ll b/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync-64.ll
index d54d679e78f0..f9efc1c4c6e5 100644
--- a/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync-64.ll
+++ b/llvm/test/CodeGen/PowerPC/builtins-ppc-xlcompat-sync-64.ll
@@ -4,18 +4,13 @@
 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-unknown \
 ; RUN:   --ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s
 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-aix \
-; RUN:   --ppc-asm-full-reg-names -mcpu=pwr7 < %s | FileCheck %s --check-prefix=CHECK-AIX
+; RUN:   --ppc-asm-full-reg-names -mcpu=pwr7 < %s | FileCheck %s
 
 define dso_local i64 @test_builtin_ppc_popcntb_i64(i64 %a) local_unnamed_addr {
 ; CHECK-LABEL: test_builtin_ppc_popcntb_i64:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    popcntb r3, r3
 ; CHECK-NEXT:    blr
-;
-; CHECK-AIX-LABEL: test_builtin_ppc_popcntb_i64:
-; CHECK-AIX:       # %bb.0: # %entry
-; CHECK-AIX-NEXT:    popcntb r3, r3
-; CHECK-AIX-NEXT:    blr
 entry:
   %popcntb = tail call i64 @llvm.ppc.popcntb.i64.i64(i64 %a)
   ret i64 %popcntb
@@ -29,13 +24,6 @@ define dso_local void @test_builtin_ppc_eieio() {
 ; CHECK-NEXT:    ori r2, r2, 0
 ; CHECK-NEXT:    eieio
 ; CHECK-NEXT:    blr
-;
-; CHECK-AIX-LABEL: test_builtin_ppc_eieio:
-; CHECK-AIX:       # %bb.0: # %entry
-; CHECK-AIX-NEXT:    ori r2, r2, 0
-; CHECK-AIX-NEXT:    ori r2, r2, 0
-; CHECK-AIX-NEXT:    eieio
-; CHECK-AIX-NEXT:    blr
 entry:
   call void @llvm.ppc.eieio()
   ret void
@@ -49,13 +37,6 @@ define dso_local void @test_builtin_ppc_iospace_eieio() {
 ; CHECK-NEXT:    ori r2, r2, 0
 ; CHECK-NEXT:    eieio
 ; CHECK-NEXT:    blr
-;
-; CHECK-AIX-LABEL: test_builtin_ppc_iospace_eieio:
-; CHECK-AIX:       # %bb.0: # %entry
-; CHECK-AIX-NEXT:    ori r2, r2, 0
-; CHECK-AIX-NEXT:    ori r2, r2, 0
-; CHECK-AIX-NEXT:    eieio
-; CHECK-AIX-NEXT:    blr
 entry:
   call void @llvm.ppc.iospace.eieio()
   ret void
@@ -67,11 +48,6 @@ define dso_local void @test_builtin_ppc_iospace_lwsync() {
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    lwsync
 ; CHECK-NEXT:    blr
-;
-; CHECK-AIX-LABEL: test_builtin_ppc_iospace_lwsync:
-; CHECK-AIX:       # %bb.0: # %entry
-; CHECK-AIX-NEXT:    lwsync
-; CHECK-AIX-NEXT:    blr
 entry:
   call void @llvm.ppc.iospace.lwsync()
   ret void
@@ -83,11 +59,6 @@ define dso_local void @test_builtin_ppc_iospace_sync() {
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    sync
 ; CHECK-NEXT:    blr
-;
-; CHECK-AIX-LABEL: test_builtin_ppc_iospace_sync:
-; CHECK-AIX:       # %bb.0: # %entry
-; CHECK-AIX-NEXT:    sync
-; CHECK-AIX-NEXT:    blr
 entry:
   call void @llvm.ppc.iospace.sync()
   ret void
@@ -100,12 +71,6 @@ define dso_local void @test_builtin_ppc_icbt() {
 ; CHECK-NEXT:    ld r3, -8(r1)
 ; CHECK-NEXT:    icbt 0, 0, r3
 ; CHECK-NEXT:    blr
-;
-; CHECK-AIX-LABEL: test_builtin_ppc_icbt:
-; CHECK-AIX:       # %bb.0: # %entry
-; CHECK-AIX-NEXT:    ld r3, -8(r1)
-; CHECK-AIX-NEXT:    icbt 0, 0, r3
-; CHECK-AIX-NEXT:    blr
 entry:
   %a = alloca i8*, align 8
   %0 = load i8*, i8** %a, align 8