[PATCH] D113603: [x86] fold vector (X > -1) & Y to shift+andn

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:45812
+  // requires "and" rather than "andn":
+  // and (pcmpgt X, -1), Y --> pandn (sra X, BW-1), Y
+  if (supportedVectorShiftWithImm(VT.getSimpleVT(), Subtarget, ISD::SRA)) {
----------------
pengfei wrote:
> What's the BW mean? Byte and word? But the tests show for i16 and i32.
I assume it’s BitWidth


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D113603/new/

https://reviews.llvm.org/D113603