[PATCH] D113568: [RISCV] Optimize immediate materialisation with SH*ADD

Ben Shi via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Nov 10 18:11:20 PST 2021


benshi001 marked an inline comment as done.
benshi001 added inline comments.


================
Comment at: llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp:294
+           "unexpected instruction sequence for immediate materialisation");
+    if (isInt<32>((uint64_t)(Hi52 / 3)) && (Hi52 % 3) == 0) {
+      Div = 3;
----------------
craig.topper wrote:
> Why do we need a cast to `uint64_t` after the divide?
the cast to `uint64` is removed.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D113568/new/

https://reviews.llvm.org/D113568



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