[PATCH] D113568: [RISCV] Optimize immediate materialisation with SH*ADD

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Nov 10 15:35:59 PST 2021


craig.topper requested changes to this revision.
craig.topper added a comment.
This revision now requires changes to proceed.

I accidentally accepted this and I think I can only undo that by selecting Request Changes. Sorry.



================
Comment at: llvm/lib/Target/RISCV/MCTargetDesc/RISCVMatInt.cpp:294
+           "unexpected instruction sequence for immediate materialisation");
+    if (isInt<32>((uint64_t)(Hi52 / 3)) && (Hi52 % 3) == 0) {
+      Div = 3;
----------------
Why do we need a cast to `uint64_t` after the divide?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D113568/new/

https://reviews.llvm.org/D113568



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