[llvm] fa4e9e6 - [InstCombine] Add vector variants to merge-icmps.ll (NFC)

[Nikita Popov via llvm-commits]

Author: Nikita Popov
Date: 2021-11-10T22:36:06+01:00
New Revision: fa4e9e64e2daae54084c94a7700822a3c584c2c0

URL: https://github.com/llvm/llvm-project/commit/fa4e9e64e2daae54084c94a7700822a3c584c2c0
DIFF: https://github.com/llvm/llvm-project/commit/fa4e9e64e2daae54084c94a7700822a3c584c2c0.diff

LOG: [InstCombine] Add vector variants to merge-icmps.ll (NFC)

And regenerate test checks.

Added: 
    

Modified: 
    llvm/test/Transforms/InstCombine/and.ll
    llvm/test/Transforms/InstCombine/and2.ll
    llvm/test/Transforms/InstCombine/merge-icmp.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/InstCombine/and.ll b/llvm/test/Transforms/InstCombine/and.ll
index 2b8a214b86af..0e25d2d47103 100644
--- a/llvm/test/Transforms/InstCombine/and.ll
+++ b/llvm/test/Transforms/InstCombine/and.ll
@@ -347,9 +347,9 @@ define i1 @test24_logical(i32 %A) {
 
 define i1 @test25(i32 %A) {
 ; CHECK-LABEL: @test25(
-; CHECK-NEXT:    [[A_OFF:%.*]] = add i32 [[A:%.*]], -50
-; CHECK-NEXT:    [[TMP1:%.*]] = icmp ult i32 [[A_OFF]], 50
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[TMP1:%.*]] = add i32 [[A:%.*]], -50
+; CHECK-NEXT:    [[TMP2:%.*]] = icmp ult i32 [[TMP1]], 50
+; CHECK-NEXT:    ret i1 [[TMP2]]
 ;
   %B = icmp sge i32 %A, 50
   %C = icmp slt i32 %A, 100
@@ -359,9 +359,9 @@ define i1 @test25(i32 %A) {
 
 define i1 @test25_logical(i32 %A) {
 ; CHECK-LABEL: @test25_logical(
-; CHECK-NEXT:    [[A_OFF:%.*]] = add i32 [[A:%.*]], -50
-; CHECK-NEXT:    [[TMP1:%.*]] = icmp ult i32 [[A_OFF]], 50
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[TMP1:%.*]] = add i32 [[A:%.*]], -50
+; CHECK-NEXT:    [[TMP2:%.*]] = icmp ult i32 [[TMP1]], 50
+; CHECK-NEXT:    ret i1 [[TMP2]]
 ;
   %B = icmp sge i32 %A, 50
   %C = icmp slt i32 %A, 100

diff  --git a/llvm/test/Transforms/InstCombine/and2.ll b/llvm/test/Transforms/InstCombine/and2.ll
index 05013c8724e2..03be031e930e 100644
--- a/llvm/test/Transforms/InstCombine/and2.ll
+++ b/llvm/test/Transforms/InstCombine/and2.ll
@@ -61,9 +61,9 @@ define i1 @test7_logical(i32 %i, i1 %b) {
 
 define i1 @test8(i32 %i) {
 ; CHECK-LABEL: @test8(
-; CHECK-NEXT:    [[I_OFF:%.*]] = add i32 [[I:%.*]], -1
-; CHECK-NEXT:    [[TMP1:%.*]] = icmp ult i32 [[I_OFF]], 13
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[TMP1:%.*]] = add i32 [[I:%.*]], -1
+; CHECK-NEXT:    [[TMP2:%.*]] = icmp ult i32 [[TMP1]], 13
+; CHECK-NEXT:    ret i1 [[TMP2]]
 ;
   %cmp1 = icmp ne i32 %i, 0
   %cmp2 = icmp ult i32 %i, 14
@@ -73,9 +73,9 @@ define i1 @test8(i32 %i) {
 
 define i1 @test8_logical(i32 %i) {
 ; CHECK-LABEL: @test8_logical(
-; CHECK-NEXT:    [[I_OFF:%.*]] = add i32 [[I:%.*]], -1
-; CHECK-NEXT:    [[TMP1:%.*]] = icmp ult i32 [[I_OFF]], 13
-; CHECK-NEXT:    ret i1 [[TMP1]]
+; CHECK-NEXT:    [[TMP1:%.*]] = add i32 [[I:%.*]], -1
+; CHECK-NEXT:    [[TMP2:%.*]] = icmp ult i32 [[TMP1]], 13
+; CHECK-NEXT:    ret i1 [[TMP2]]
 ;
   %cmp1 = icmp ne i32 %i, 0
   %cmp2 = icmp ult i32 %i, 14

diff  --git a/llvm/test/Transforms/InstCombine/merge-icmp.ll b/llvm/test/Transforms/InstCombine/merge-icmp.ll
index e9f9bb31a0e4..2a1ddf5e69f2 100644
--- a/llvm/test/Transforms/InstCombine/merge-icmp.ll
+++ b/llvm/test/Transforms/InstCombine/merge-icmp.ll
@@ -31,6 +31,25 @@ define i1 @test1_logical(i16* %x) {
   ret i1 %or
 }
 
+define <2 x i1> @test1_vector(<2 x i16>* %x) {
+; CHECK-LABEL: @test1_vector(
+; CHECK-NEXT:    [[LOAD:%.*]] = load <2 x i16>, <2 x i16>* [[X:%.*]], align 4
+; CHECK-NEXT:    [[TRUNC:%.*]] = trunc <2 x i16> [[LOAD]] to <2 x i8>
+; CHECK-NEXT:    [[CMP1:%.*]] = icmp eq <2 x i8> [[TRUNC]], <i8 127, i8 127>
+; CHECK-NEXT:    [[AND:%.*]] = and <2 x i16> [[LOAD]], <i16 -256, i16 -256>
+; CHECK-NEXT:    [[CMP2:%.*]] = icmp eq <2 x i16> [[AND]], <i16 17664, i16 17664>
+; CHECK-NEXT:    [[OR:%.*]] = and <2 x i1> [[CMP1]], [[CMP2]]
+; CHECK-NEXT:    ret <2 x i1> [[OR]]
+;
+  %load = load <2 x i16>, <2 x i16>* %x, align 4
+  %trunc = trunc <2 x i16> %load to <2 x i8>
+  %cmp1 = icmp eq <2 x i8> %trunc, <i8 127, i8 127>
+  %and = and <2 x i16> %load, <i16 -256, i16 -256>
+  %cmp2 = icmp eq <2 x i16> %and, <i16 17664, i16 17664>
+  %or = and <2 x i1> %cmp1, %cmp2
+  ret <2 x i1> %or
+}
+
 define i1 @test2(i16* %x) {
 ; CHECK-LABEL: @test2(
 ; CHECK-NEXT:    [[LOAD:%.*]] = load i16, i16* [[X:%.*]], align 4
@@ -60,3 +79,22 @@ define i1 @test2_logical(i16* %x) {
   %or = select i1 %cmp1, i1 %cmp2, i1 false
   ret i1 %or
 }
+
+define <2 x i1> @test2_vector(<2 x i16>* %x) {
+; CHECK-LABEL: @test2_vector(
+; CHECK-NEXT:    [[LOAD:%.*]] = load <2 x i16>, <2 x i16>* [[X:%.*]], align 4
+; CHECK-NEXT:    [[AND:%.*]] = and <2 x i16> [[LOAD]], <i16 -256, i16 -256>
+; CHECK-NEXT:    [[CMP1:%.*]] = icmp eq <2 x i16> [[AND]], <i16 32512, i16 32512>
+; CHECK-NEXT:    [[TRUNC:%.*]] = trunc <2 x i16> [[LOAD]] to <2 x i8>
+; CHECK-NEXT:    [[CMP2:%.*]] = icmp eq <2 x i8> [[TRUNC]], <i8 69, i8 69>
+; CHECK-NEXT:    [[OR:%.*]] = and <2 x i1> [[CMP1]], [[CMP2]]
+; CHECK-NEXT:    ret <2 x i1> [[OR]]
+;
+  %load = load <2 x i16>, <2 x i16>* %x, align 4
+  %and = and <2 x i16> %load, <i16 -256, i16 -256>
+  %cmp1 = icmp eq <2 x i16> %and, <i16 32512, i16 32512>
+  %trunc = trunc <2 x i16> %load to <2 x i8>
+  %cmp2 = icmp eq <2 x i8> %trunc, <i8 69, i8 69>
+  %or = and <2 x i1> %cmp1, %cmp2
+  ret <2 x i1> %or
+}