[llvm] b1d8d70 - [SelectionDAG] Replace the Chain in LOAD->VP_LOAD widening

[Fraser Cormack via llvm-commits]

Author: Fraser Cormack
Date: 2021-11-10T17:49:12Z
New Revision: b1d8d70b9deac9c71b903c2f7fa2cd5ed8f8cc0d

URL: https://github.com/llvm/llvm-project/commit/b1d8d70b9deac9c71b903c2f7fa2cd5ed8f8cc0d
DIFF: https://github.com/llvm/llvm-project/commit/b1d8d70b9deac9c71b903c2f7fa2cd5ed8f8cc0d.diff

LOG: [SelectionDAG] Replace the Chain in LOAD->VP_LOAD widening

The introduction of this legalization, D111248, forgot to replace the
old chain with the new. This could manifest itself in the old
(illegally-typed) value remaining in the DAG, though the simple test
cases didn't catch this.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D113561

Added: 
    

Modified: 
    llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
    llvm/test/CodeGen/RISCV/rvv/legalize-load-sdnode.ll

Removed: 
    


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diff  --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
index b5ff6b5815a0..6da8c3ced060 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
@@ -4214,9 +4214,16 @@ SDValue DAGTypeLegalizer::WidenVecRes_LOAD(SDNode *N) {
     SDValue EVL =
         DAG.getVScale(DL, EVLVT, APInt(EVLVT.getScalarSizeInBits(), NumVTElts));
     const auto *MMO = LD->getMemOperand();
-    return DAG.getLoadVP(WideVT, DL, LD->getChain(), LD->getBasePtr(), Mask,
-                         EVL, MMO->getPointerInfo(), MMO->getAlign(),
-                         MMO->getFlags(), MMO->getAAInfo());
+    SDValue NewLoad =
+        DAG.getLoadVP(WideVT, DL, LD->getChain(), LD->getBasePtr(), Mask, EVL,
+                      MMO->getPointerInfo(), MMO->getAlign(), MMO->getFlags(),
+                      MMO->getAAInfo());
+
+    // Modified the chain - switch anything that used the old chain to use
+    // the new one.
+    ReplaceValueWith(SDValue(N, 1), NewLoad.getValue(1));
+
+    return NewLoad;
   }
 
   report_fatal_error("Unable to widen vector load");

diff  --git a/llvm/test/CodeGen/RISCV/rvv/legalize-load-sdnode.ll b/llvm/test/CodeGen/RISCV/rvv/legalize-load-sdnode.ll
index aedf2b8cf96f..1a2d01e2888b 100644
--- a/llvm/test/CodeGen/RISCV/rvv/legalize-load-sdnode.ll
+++ b/llvm/test/CodeGen/RISCV/rvv/legalize-load-sdnode.ll
@@ -31,3 +31,19 @@ define <vscale x 5 x half> @load_nxv5f16(<vscale x 5 x half>* %ptr) {
   %v = load <vscale x 5 x half>, <vscale x 5 x half>* %ptr
   ret <vscale x 5 x half> %v
 }
+
+define <vscale x 7 x half> @load_nxv7f16(<vscale x 7 x half>* %ptr, <vscale x 7 x half>* %out) {
+; CHECK-LABEL: load_nxv7f16:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    csrr a2, vlenb
+; CHECK-NEXT:    srli a2, a2, 3
+; CHECK-NEXT:    slli a3, a2, 3
+; CHECK-NEXT:    sub a2, a3, a2
+; CHECK-NEXT:    vsetvli zero, a2, e16, m2, ta, mu
+; CHECK-NEXT:    vle16.v v8, (a0)
+; CHECK-NEXT:    vse16.v v8, (a1)
+; CHECK-NEXT:    ret
+  %v = load <vscale x 7 x half>, <vscale x 7 x half>* %ptr
+  store <vscale x 7 x half> %v, <vscale x 7 x half>* %out
+  ret <vscale x 7 x half> %v
+}