[llvm] ef2d0e0 - [llvm] Use MachineBasicBlock::{successors,predecessors} (NFC)
Kazu Hirata via llvm-commits
llvm-commits at lists.llvm.org
Tue Nov 9 23:05:30 PST 2021
Author: Kazu Hirata
Date: 2021-11-09T23:05:15-08:00
New Revision: ef2d0e0f20308aa32426fcf2021d5e4958fa4e1f
URL: https://github.com/llvm/llvm-project/commit/ef2d0e0f20308aa32426fcf2021d5e4958fa4e1f
DIFF: https://github.com/llvm/llvm-project/commit/ef2d0e0f20308aa32426fcf2021d5e4958fa4e1f.diff
LOG: [llvm] Use MachineBasicBlock::{successors,predecessors} (NFC)
Added:
Modified:
llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
llvm/lib/CodeGen/MachineSink.cpp
llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp
llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
llvm/lib/Target/PowerPC/PPCEarlyReturn.cpp
llvm/lib/Target/SystemZ/SystemZMachineScheduler.cpp
Removed:
################################################################################
diff --git a/llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp b/llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
index 231367ed2003..a4eb3094612b 100644
--- a/llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
+++ b/llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
@@ -3240,10 +3240,8 @@ template <> class SSAUpdaterTraits<LDVSSAUpdater> {
/// vector.
static void FindPredecessorBlocks(LDVSSABlock *BB,
SmallVectorImpl<LDVSSABlock *> *Preds) {
- for (MachineBasicBlock::pred_iterator PI = BB->BB.pred_begin(),
- E = BB->BB.pred_end();
- PI != E; ++PI)
- Preds->push_back(BB->Updater.getSSALDVBlock(*PI));
+ for (MachineBasicBlock *Pred : BB->BB.predecessors())
+ Preds->push_back(BB->Updater.getSSALDVBlock(Pred));
}
/// GetUndefVal - Normally creates an IMPLICIT_DEF instruction with a new
diff --git a/llvm/lib/CodeGen/MachineSink.cpp b/llvm/lib/CodeGen/MachineSink.cpp
index 748218ec01b5..4ea8bb488ab3 100644
--- a/llvm/lib/CodeGen/MachineSink.cpp
+++ b/llvm/lib/CodeGen/MachineSink.cpp
@@ -682,13 +682,9 @@ bool MachineSinking::PostponeSplitCriticalEdge(MachineInstr &MI,
// There is no need to do this check if all the uses are PHI nodes. PHI
// sources are only defined on the specific predecessor edges.
if (!BreakPHIEdge) {
- for (MachineBasicBlock::pred_iterator PI = ToBB->pred_begin(),
- E = ToBB->pred_end(); PI != E; ++PI) {
- if (*PI == FromBB)
- continue;
- if (!DT->dominates(ToBB, *PI))
+ for (MachineBasicBlock *Pred : ToBB->predecessors())
+ if (Pred != FromBB && !DT->dominates(ToBB, Pred))
return false;
- }
}
ToSplit.insert(std::make_pair(FromBB, ToBB));
diff --git a/llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp b/llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp
index 3ff8bcfa7f36..c2e3d7393a6d 100644
--- a/llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp
+++ b/llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp
@@ -838,9 +838,8 @@ bool MipsDelaySlotFiller::searchSuccBBs(MachineBasicBlock &MBB,
auto *Fn = MBB.getParent();
// Iterate over SuccBB's predecessor list.
- for (MachineBasicBlock::pred_iterator PI = SuccBB->pred_begin(),
- PE = SuccBB->pred_end(); PI != PE; ++PI)
- if (!examinePred(**PI, *SuccBB, RegDU, HasMultipleSuccs, BrMap))
+ for (MachineBasicBlock *Pred : SuccBB->predecessors())
+ if (!examinePred(*Pred, *SuccBB, RegDU, HasMultipleSuccs, BrMap))
return false;
// Do not allow moving instructions which have unallocatable register operands
diff --git a/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp b/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
index 98442acb933a..aab6d2034f11 100644
--- a/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
+++ b/llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
@@ -417,8 +417,7 @@ bool NVPTXAsmPrinter::isLoopHeaderOfNoUnroll(
// llvm.loop.unroll.disable is marked on the back edges of a loop. Therefore,
// we iterate through each back edge of the loop with header MBB, and check
// whether its metadata contains llvm.loop.unroll.disable.
- for (auto I = MBB.pred_begin(); I != MBB.pred_end(); ++I) {
- const MachineBasicBlock *PMBB = *I;
+ for (const MachineBasicBlock *PMBB : MBB.predecessors()) {
if (LI.getLoopFor(PMBB) != LI.getLoopFor(&MBB)) {
// Edges from other loops to MBB are not back edges.
continue;
diff --git a/llvm/lib/Target/PowerPC/PPCEarlyReturn.cpp b/llvm/lib/Target/PowerPC/PPCEarlyReturn.cpp
index 5a2c295d947e..ff3d36d39fb2 100644
--- a/llvm/lib/Target/PowerPC/PPCEarlyReturn.cpp
+++ b/llvm/lib/Target/PowerPC/PPCEarlyReturn.cpp
@@ -62,15 +62,14 @@ namespace {
return Changed;
SmallVector<MachineBasicBlock*, 8> PredToRemove;
- for (MachineBasicBlock::pred_iterator PI = ReturnMBB.pred_begin(),
- PIE = ReturnMBB.pred_end(); PI != PIE; ++PI) {
+ for (MachineBasicBlock *Pred : ReturnMBB.predecessors()) {
bool OtherReference = false, BlockChanged = false;
- if ((*PI)->empty())
+ if (Pred->empty())
continue;
- for (MachineBasicBlock::iterator J = (*PI)->getLastNonDebugInstr();;) {
- if (J == (*PI)->end())
+ for (MachineBasicBlock::iterator J = Pred->getLastNonDebugInstr();;) {
+ if (J == Pred->end())
break;
if (J->getOpcode() == PPC::B) {
@@ -78,7 +77,7 @@ namespace {
// This is an unconditional branch to the return. Replace the
// branch with a blr.
MachineInstr *MI = ReturnMBB.getParent()->CloneMachineInstr(&*I);
- (*PI)->insert(J, MI);
+ Pred->insert(J, MI);
MachineBasicBlock::iterator K = J--;
K->eraseFromParent();
@@ -95,7 +94,7 @@ namespace {
MachineInstrBuilder(*ReturnMBB.getParent(), MI)
.add(J->getOperand(0))
.add(J->getOperand(1));
- (*PI)->insert(J, MI);
+ Pred->insert(J, MI);
MachineBasicBlock::iterator K = J--;
K->eraseFromParent();
@@ -112,7 +111,7 @@ namespace {
TII->get(J->getOpcode() == PPC::BC ? PPC::BCLR : PPC::BCLRn));
MachineInstrBuilder(*ReturnMBB.getParent(), MI)
.add(J->getOperand(0));
- (*PI)->insert(J, MI);
+ Pred->insert(J, MI);
MachineBasicBlock::iterator K = J--;
K->eraseFromParent();
@@ -132,18 +131,18 @@ namespace {
} else if (!J->isTerminator() && !J->isDebugInstr())
break;
- if (J == (*PI)->begin())
+ if (J == Pred->begin())
break;
--J;
}
- if ((*PI)->canFallThrough() && (*PI)->isLayoutSuccessor(&ReturnMBB))
+ if (Pred->canFallThrough() && Pred->isLayoutSuccessor(&ReturnMBB))
OtherReference = true;
// Predecessors are stored in a vector and can't be removed here.
if (!OtherReference && BlockChanged) {
- PredToRemove.push_back(*PI);
+ PredToRemove.push_back(Pred);
}
if (BlockChanged)
diff --git a/llvm/lib/Target/SystemZ/SystemZMachineScheduler.cpp b/llvm/lib/Target/SystemZ/SystemZMachineScheduler.cpp
index a6adaaa2dcef..4bc979de795d 100644
--- a/llvm/lib/Target/SystemZ/SystemZMachineScheduler.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZMachineScheduler.cpp
@@ -46,9 +46,9 @@ static MachineBasicBlock *getSingleSchedPred(MachineBasicBlock *MBB,
// The loop header has two predecessors, return the latch, but not for a
// single block loop.
if (MBB->pred_size() == 2 && Loop != nullptr && Loop->getHeader() == MBB) {
- for (auto I = MBB->pred_begin(); I != MBB->pred_end(); ++I)
- if (Loop->contains(*I))
- PredMBB = (*I == MBB ? nullptr : *I);
+ for (MachineBasicBlock *Pred : MBB->predecessors())
+ if (Loop->contains(Pred))
+ PredMBB = (Pred == MBB ? nullptr : Pred);
}
assert ((PredMBB == nullptr || !Loop || Loop->contains(PredMBB))
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